Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2001-05-23
2004-10-19
Norton, Nadine G. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S712000, C252S079100, C216S033000, C156S345420
Reexamination Certificate
active
06806198
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to semiconductor devices and their fabrication and, more particularly, to semiconductor devices and their manufacture involving techniques for manufacturing, analyzing and debugging circuitry within an integrated circuit die.
BACKGROUND OF THE INVENTION
Recent technological advances in the semiconductor industry have permitted dramatic increases in circuit density and complexity, and commensurate decreases in power consumption and package sizes for integrated circuit devices. Single-chip microprocessors now include many millions of transistors operating at speeds of hundreds of millions of instructions per second to be packaged in relatively small, air-cooled semiconductor device packages. A byproduct of these technological advances has been an increased demand for semiconductor-based products, as well as increased demand for these products to be fast, reliable, and inexpensive. These and other demands have led to increased pressure to manufacture a large number of semiconductor devices at an efficient pace while increasing the complexity and improving the reliability of the devices.
As the manufacturing processes for semiconductor devices and integrated circuits increase in difficulty, methods for manufacturing, testing and debugging these devices become increasingly important. Not only is it important to ensure that individual chips are functional, it is also important to ensure that batches of chips perform consistently. In addition, the ability to detect a defective manufacturing process early is helpful for reducing the possibility of manufacturing a defective device. It is also helpful to be able to perform the manufacture, testing and debugging of integrated circuits in an efficient and timely manner.
Many commonly-used semiconductor processes include using a focused ion beam (FIB) in the presence of a gas to perform gas-assisted etching (GAE). In GAE, a gas is introduced to a surface of a die, and an ion beam is directed at a portion of the surface to be etched. The FIB, in the presence of the gas, causes the removal of substrate near the portion of the die, and is useful for milling various types of materials in a semiconductor die. However, the type of gas that is used for GAE is not always compatible with different types of semiconductor materials. For example, when aluminum is milled, chlorine or other halides, such as bromine or iodine, are often used for GAE. If these halides are present during a subsequent copper milling operation, spontaneous reaction (e.g., halide gas reacting with copper spontaneously and without ion beam induction) and/or other corrosion typically occurs in areas having exposed copper. This presents a particularly challenging issue when using a selected FIB GAE arrangement for aluminum, and using the same arrangement for copper thereafter. Halide gas remaining in the FIB GAE arrangement can cause react with the copper and cause corrosion.
For these and other reasons, a method and system for FIB GAE of IC devices that address these challenges would be beneficial.
SUMMARY OF THE INVENTION
The present invention is directed to a method and system for GAE of an integrated circuit die involving an FIB application. A particular aspect of the present invention is directed to providing the ability to efficiently process semiconductor wafers in an environment that is flexible for use with various types of semiconductor materials. The present invention is exemplified in a number of implementations and applications, some of which are summarized below.
According to an example embodiment, the present invention is directed to a method for focused ion beam (FIB) gas-assisted etching (GAE) of an integrated circuit die. An etch gas including a halide gas is supplied to the die. An ion beam, (e.g., using a FIB system) is directed at a selected portion of the die and, using the etch gas and the ion beam, the die is etched. While etching the die, sufficient oxygen is supplied to the die to inhibit corrosion of a portion of the copper in the die being exposed to the etch gas. This method of etching addresses problems discussed hereinabove as well as other problems associated with etching integrated circuit dies, and particularly improves the applicability of halide gas to the etching of dies having copper circuitry.
According to another example embodiment of the present invention, a system is adapted for FIB GAE etching of an integrated circuit die having copper circuitry. The system includes an etch gas supply adapted to supply etch gas, including a halide gas, to the die. An oxygen supply is adapted to supply sufficient oxygen to the die to inhibit corrosion of a portion of the copper in the die being exposed to the etch gas. A FIB device is adapted to direct a FIB at a selected portion of the die and, using the etch gas and the FIB, to etch the die.
The above summary of the present invention is not intended to describe each illustrated embodiment or every implementation of the present invention. The figures and detailed description that follow more particularly exemplify these embodiments.
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Blish, II Richard
Li Susan Xia
Ring Rosalinda M.
Advanced Micro Devices , Inc.
Norton Nadine G.
Umez-Eronini Lynette T.
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