Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor
Reexamination Certificate
2001-12-18
2003-03-18
Tran, Minh Loan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Field effect transistor
C257S190000, C257S194000, C257S195000, C257S285000, C257S590000
Reexamination Certificate
active
06534801
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a high electron mobility transistor (HEMT) manufactured by using a GaN-based compound semiconductor. More particularly, it relates to a GaN-based HEMT comprising an undoped GaN layer forming a channel, wherein the undoped GaN layer is highly purified or remaining n-type impurities in the GaN layer caused by lattice defects during layer formation are compensated by a p-type impurity, thereby providing the channel with a high electric resistivity and enabling a pinch-off state to be realized when the gate bias voltage is set to zero volt.
2. Prior Art
There is an expectation for the HEMT as a high-output microwave device, for example. The HEMTs are manufactured by using mainly a GaAs-based compound semiconductor today.
However, the HEMT using the GaAs-based compound semiconductor does not have so high dielectric-breakdown electric field value at the heterojunction interface. Thus, the GaAs-based HEMT has difficulty in realization of high speed operation by the application of a high voltage to the gate electrode.
In view of this, recently, attention has been focused on an HEMT using a GaN-based compound semiconductor which has a higher potential (about 2.6 times) of hetero barrier at the heterojunction interface and a larger (by about an order of magnitude) dielectric breakdown electric field value, than the GaAs-based compound semiconductor. The GaN-based HEMT also has excellent heat resistance, and trial and research for the GaN-based HEMT is under way.
For example, the GaN-based HEMT is produced by an MOCVD method as follows.
First, a buffer layer made of GaN is formed on a semi-insulating sapphire substrate. Then, an undoped (i-type) GaN layer is formed on the GaN buffer layer, using trimethylgallium as a Ga source and ammonia as an N source. Further, an n-type AlGaN layer is formed on the undoped GaN layer by using trimethylaluminum as an Al source and Si as an n-type impurity. After SiO
2
is deposited on the n-type AlGaN layer by a plasma CVD method, conventional photolithography and etching are performed, and thereafter predetermined materials are vapor deposited to form a gate electrode, a source electrode and a drain electrode at predetermined locations.
In such a layered structure, the portion of the n-type AlGaN layer where the gate electrode is formed functions as a source of electrons to be supplied to the undoped GaN layer located below. The supplied electrons form a two-dimensional electron gas layer at the heterojunction interface between the undoped GaN layer and the n-type AlGaN layer, specifically at an upper most layer portion of the undoped GaN layer. There, the electrons move at high speed, thereby realizing an HEMT operation. To realize the high mobility of the electrons, it is necessary that the undoped GaN layer has as little impurities or lattice defects as possible.
However, in the case of the HEMT with the above-described layered structure, usually a great number of lattice defects exist in the undoped GaN layer formed, for example, by the MOCVD method. Particularly, a great number of lattice defects due to dangling bonds of nitrogen atoms are present. These lattice defecte remain as an n-type impurity which functions as a donor impurity (hereafter referred to as remaining n-type impurity). As a result, the formed GaN layer does not have a high resistance and instead exhibits the properties of an n-type semiconductor layer. Specifically, there is obtained a state as if an n-type impurity with a concentration of the order of 1×10
16
cm
−3
were doped, with the resulting electric resistivity of the order of 500 &OHgr;/cm
2
.
As this kind of state lowers the electric resistivity of the undoped GaN layer, a problem arises that a pinch-off state cannot be realized even when the gate bias voltage is set at 0 V.
Thus, in the conventional GaN-based HEMTs, the n-type impurity is effectively doped in the undoped GaN layer due to the above-mentioned problems arising during the film formation process. As a result, the undoped GaN layer cannot be given a high resistance, preventing a sufficiently high enough electron mobility and making it impossible to realize a pinch-off state even if the gate bias voltage is set at zero.
OBJECT AND SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a novel GaN-based HEMT which can solve the above-mentioned problems of the prior art and remove the influence of the remaining n-type impurity, whereby the electric resistivity of the undoped GaN layer can be greatly increased to enable the high mobility of the electrons while making it possible to realize a pinch-off state when the gate bias voltage is set at 0 V.
To achieve this objective, the GaN-based HEMT according to the present invention comprises a semi-insulating substrate on which a buffer layer is formed, wherein a layered structure is further formed on the buffer layer, the layered structure comprising:
an undoped GaN layer having an electric resistivity of not less than 1×10
6
&OHgr;/cm
2
;
an undoped AlGaN layer disposed on the undoped GaN layer via a heterojunction with an undercut portion formed therebetween; and
an n-type GaN layer disposed in such a manner as to bury side portions of the undoped AlGaN layer and the undercut portion, wherein:
a gate electrode is formed on the undoped AlGaN layer, and a source electrode and a drain electrode are formed on the n-type GaN layer.
The undoped GaN layer may preferably be formed by doping a p-type impurity during the layer formation process to compensate the remaining n-type impurity.
REFERENCES:
patent: 6156581 (2000-12-01), Vaudo et al.
patent: 6177685 (2001-01-01), Teraguchi et al.
patent: 2001/0023964 (2001-09-01), Wu et al.
patent: 11261052 (1999-09-01), None
The Furukawa Electric Co. Ltd.
Tran Minh Loan
Tran Tan
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