Excavating
Patent
1997-02-18
1998-10-06
Elmore, Reba I.
Excavating
371 3712, 371 4017, H03M 1300
Patent
active
058188550
ABSTRACT:
A Reed-Solomon decoder includes an optimized Galois Field multiplication circuit. The circuit has a plurality of multipliers, connected in a linear chain, wherein a first multiplicand of the first multiplier is the magnitude A, and the second multiplicand is a constant. The circuit operates on a linear combination of alpha values that sum to .alpha..sup.j, each multiplier in the chain generating a succeeding alpha value. A plurality of selectors enable the outputs of the multipliers according to the magnitude .alpha..sup.j. An addition circuit, preferably realized as a logical network of XOR gates, is connected to the selectors for adding the enabled outputs of the multipliers to form the final product.
REFERENCES:
patent: 3872430 (1975-03-01), Boudreau et al.
patent: 4162480 (1979-07-01), Berlekamp
patent: 4559625 (1985-12-01), Berlekamp et al.
patent: 4633470 (1986-12-01), Welch et al.
patent: 4833678 (1989-05-01), Cohen
patent: 5465261 (1995-11-01), Descheme
patent: 5500874 (1996-03-01), Terrell
patent: 5668831 (1997-09-01), Claydon et al.
Scott et al., "Architectures for Exponentiation in GF(20 m)", IEEE, pp. 578-586, Apr. 1988.
Lay et al., "A Decision-Aided Adaptive Equalizer With Simplified Implentation" IEEE, pp. 13851389, 1988.
Jaffe et al., "Incoherent Coding Techniques And performance Characterization For Multibeam Sonal Systems", IEEE, pp. 2709-2712, 1988.
Jullien et al., "A Madulo Bit-Level Systoloc Compiler", IEEE, pp. 457-460, 1989.
European Telecommunciations Standards Institute "European Telecommunication Standard: Digital Broadcasting Systems for Television, Sound and Data Service; Framing Structure, Channel Coding and Modulation for Digital Television." Valbonne, France. May 1996, pp. 1-40.
Whitaker, Sterling R. John Canaris and Kelly B. Cameron. "Reed Solomon VLSI Codec for Advanced Television." IEEE Transactions on Circuits and Systems for Video Technology, vol. 1 No. 2, Jun. 1991. pp. 230-233.
Arambeploa, B. & S. Choomchuay. Algortihms and Architectures for Reed-Solomon Codes. The GEC Journal of Research vol 9, No. 3, 1992, pp. 172-184.
Berlekamp, Elwyn R. Algebraic Coding Theory. Laguna Hills, CA: Aegean Park Press, 1984, pp. 180-184.
George C. Clark, Jr & J.Bibb Cain. Error-Correction Coding for Digital Communications, New York: Plenum Press, 1981, pp. 191-195, 209-214.
Richard E. Blahut. Theory and Practice of Error Control Codes. Reading, Mass: Addison-Wesley Publishing Company, 1984, pp. 183-191.
Bickel Arthur S.
Braun Robert T.
Clark Ronald J.
Discovision Associates
Elmore Reba I.
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