Gallium nitride semiconductor structures including lateral...

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Reexamination Certificate

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C257S615000

Reexamination Certificate

active

06570192

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to microelectronic devices and fabrication methods, and more particularly to gallium nitride semiconductor devices and fabrication methods therefor.
BACKGROUND OF THE INVENTION
Gallium nitride is being widely investigated for microelectronic devices including but not limited to transistors, field emitters and optoelectronic devices. It will be understood that, as used herein, gallium nitride also includes alloys of gallium nitride such as aluminum gallium nitride, indium gallium nitride and aluminum indium gallium nitride.
A major problem in fabricating gallium nitride-based microelectronic devices is the fabrication of gallium nitride semiconductor layers having low defect densities. It is known that one contributor to defect density is the substrate on which the gallium nitride layer is grown. Accordingly, although gallium nitride layers have been grown on sapphire substrates, it is known to reduce defect density by growing gallium nitride layers on aluminum nitride buffer layers which are themselves formed on silicon carbide substrates. Notwithstanding these advances, continued reduction in defect density is desirable.
It is also known to fabricate gallium nitride structures through openings in a mask. For example, in fabricating field emitter arrays, it is known to selectively grow gallium nitride on stripe or circular patterned substrates. See, for example, the publications by coinventor Nam et al. entitled “Selective Growth of GaN and Al
0.2
Ga
0.8
N on GaN/AlN/6H—SiC(0001) Multilayer Substrates Via Organometallic Vapor Phase Epitaxy”, Proceedings of the Materials Research Society, December 1996, and “Growth of GaN and Al
0.2
Ga
0.8
N on Patterened Substrates via Organometallic Vapor Phase Epitaxy”, Japanese Journal of Applied Physics., Vol. 36, Part 2, No. 5A, May 1997, pp. L-532-L535. As disclosed in these publications, undesired ridge growth or lateral overgrowth may occur under certain conditions.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide improved methods of fabricating gallium nitride semiconductor layers, and improved gallium nitride layers so fabricated.
It is another object of the invention to provide methods of fabricating gallium nitride semiconductor layers that can have low defect densities, and gallium nitride semiconductor layers so fabricated.
These and other objects are provided, according to the present invention, by fabricating a gallium nitride semiconductor layer by laterally growing an underlying gallium nitride layer to thereby form a laterally grown gallium nitride semiconductor layer, and forming microelectronic devices in the laterally grown gallium nitride semiconductor layer. In a preferred embodiment, a gallium nitride semiconductor layer is fabricated by masking an underlying gallium nitride layer with a mask that includes an array of openings therein and growing the underlying gallium nitride layer through the array of openings and onto the mask, to thereby form an overgrown gallium nitride semiconductor layer. Microelectronic devices may then be formed in the overgrown gallium nitride semiconductor layer.
It has been found, according to the present invention, that although dislocation defects may propagate vertically from the underlying gallium nitride layer to the grown gallium nitride layer above the mask openings, the overgrown gallium nitride layer is relatively defect-free. Accordingly, high performance microelectronic devices may be formed in the overgrown gallium nitride semiconductor layer.
According to another aspect of the present invention, the overgrown gallium nitride semiconductor layer is overgrown until the overgrown gallium nitride layer coalesces on the mask, to form a continuous overgrown monocrystalline gallium nitride semiconductor layer. The overgrown layer can thus have overgrown regions of relatively low defect in the area of coalescence and regions of relatively high defects over the mask openings.
The gallium nitride semiconductor layer may be grown using metalorganic vapor phase epitaxy (MOVPE). Preferably, the openings in the mask are stripes that are oriented along the <1{overscore (1)}00> direction of the underlying gallium nitride layer. The overgrown gallium nitride layer may be grown using triethylgallium (TEG) and ammonia (NH
3
) precursors at 1000-1100° C. and 45 Torr. Preferably, TEG at 13-39 &mgr;mol/min and NH
3
at 1500 sccm are used in combination with 3000 sccm H
2
diluent. Most preferably, TEG at 26 &mgr;mol/min, NH
3
at 1500 sccm and H
2
at 3000 sccm at a temperature of 1100° C. and 45 Torr are used. The underlying gallium nitride layer preferably is formed on a substrate, which itself includes a buffer layer such as aluminum nitride, on a substrate such as 6H—SiC(0001).
Gallium nitride semiconductor structures according to the present invention include an underlying gallium nitride layer, a lateral gallium nitride layer that extends from the underlying gallium nitride layer, and a plurality of microelectronic devices in the lateral gallium nitride layer. In a preferred embodiment, gallium nitride semiconductor structures according to the present invention include an underlying gallium nitride layer and a patterned layer (such as a mask) that includes an array of openings therein, on the underlying gallium nitride layer. A vertical gallium nitride layer extends from the underlying gallium nitride layer through the array of openings. A lateral gallium nitride layer extends from the vertical gallium nitride layer onto the patterned layer, opposite the underlying gallium nitride layer. A plurality of microelectronic devices including but not limited to optoelectronic devices and field emitters, are formed in the lateral gallium nitride layer.
Preferably, the lateral gallium nitride layer is a continuous monocrystalline gallium nitride semiconductor layer. The underlying gallium nitride layer and the vertical gallium nitride layer both include a predetermined defect density, and the lateral gallium nitride semiconductor layer is of lower defect density than the predetermined defect density. Accordingly, low defect density gallium nitride semiconductor layers may be produced, to thereby allow the production of high-performance microelectronic devices.


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