Gallium nitride-based semiconductor light emitting device

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction

Reexamination Certificate

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C257S103000

Reexamination Certificate

active

06720570

ABSTRACT:

FIELD OF THE INVENTION
This invention generally relates to semiconductor light emitting devices, and more particularly to a novel structure for Gallium Nitride (GaN)-based semiconductor devices.
DESCRIPTION OF THE RELATED ART
It has been demonstrated in the art that multiple quantum well (MQW) structures can for optical lattices in which different quantum wells are coherently coupled due to interaction with a retarded electromagnetic field. Light-matter interaction in MQW structures depends on their structure and can be significantly and controllably modified. The III-V nitrides for use with MQW structures have long held promise for optoelectronic applications in the blue and ultraviolet wavelengths and as high-power, high-temperature semiconductors, but only recently have practical devices been developed.
FIG. 1
is a block diagram that schematically illustrates the structure of a Gallium Nitride (GaN)-based III-V compound semiconductor light emitting diode (LED) in the art. The structure
100
has a substrate
101
having an n-GaN layer
102
disposed co-extensively thereupon. An n-type semiconductor is a semiconductor type in which the density of holes in the valence band is exceeded by the density of electrons in the conduction band. N-type behavior is induced by the addition of donor impurities, such as silicon, germanium, selenium, sulfur or tellurium, to the crystal structure of III-V nitrides. A multiple quantum well (MQW) layer
103
is disposed on n-GaN layer
102
flush on one side of n-GaN layer
102
and an n-electrode
104
is disposed non-extensively opposite MQW layer
103
on the surface of n-GaN layer
102
. A p-GaN layer
105
is deposited on MQW layer
103
flush therewith and a transparent conductive layer
106
is deposited flush on p-GaN layer
105
. A p-type semiconductor is a semiconductor type in which the density of electrons in the conduction band is exceeded by the density of holes in the valence band. P-type behavior is induced by the addition of acceptor impurities, such as beryllium, strontium, barium, zinc or magnesium, to the crystal structure of III-V nitrides. A p-electrode
107
is disposed non-extensively upon transparent conductive layer
106
.
FIG. 1A
is a block diagram that schematically illustrates the structure of a Gallium Nitride (GaN)-based III-V compound semiconductor laser diode (LD) in the art. The structure
100
a
includes a substrate
101
a
having an n-GaN layer
102
a
disposed co-extensively thereon. An n-cladding layer
108
a
is disposed on n-GaN layer
102
a
flush on one side thereof and an n-electrode
104
a
is disposed non-extensively opposite the n-cladding layer
108
a
on the surface of the n-GaN layer
102
a
. A multiple quantum well (MQW) layer is disposed co-extensively on the n-cladding layer
108
a
. Moreover, a p-cladding layer
106
a
is disposed co-extensively on the MQW layer
103
a
. A p-GaN layer
105
a
is disposed co-extensively on the p-cladding layer
106
a
. A p-electrode
107
a
is disposed co-extensively on the p-GaN layer
106
a.
In such conventional structures as described in conjunction with
FIGS. 1 and 1A
, because the p-type III-V nitrides are grown after the MQW, and require a relatively high growing temperature, then in order not to influence the structure and quality of the MQW, the p-GaN growing temperature should not be too high and the growing time should not be too long. In this case, the p-GaN hole concentration, crystal quality, and thickness cannot be improved. Additionally, in LEDs, because p-GaN can absorb light emitted from the MQW, then if the thickness of the p-GaN layer increases, it will adversely influence the effectiveness of light emission. However, if the hole concentration of the p-GaN layer cannot be increased, it will make its sheet resistance extremely high, so when current flows through it, it will tend towards vertical conduction and not the desired horizontal diffusion (current spreading) on the element's surface. When the p-GaN film thickness decreases, this phenomenon will be clearly evident, significantly decreasing the LED's light emitting effectiveness and the light emitting region's size.
Prior art solutions include depositing a thin, transparent metal conducting layer on the p-GaN surface in LEDs and using this conductive layer to make the current spread evenly over the element's surface, thereby increasing the light emitting region and its effectiveness. However, because p-GaN has an extremely high work function, no metal can act in conjunction with it to effectively form a natural ohmic contact. Effective ohmic contact is crucial since the performance of semiconductor devices such as operating voltage is strongly influenced by the contact resistance. Moreover, it is difficult to increase the concentration of p-GaN, and the p-GaN surface is easily contaminated by airborne particles and oxidized. These factors make it difficult to achieve an effective ohmic contact between the p-GaN and a metal conducting layer thereby influencing the electrical properties. There have been other attempts in the art to solve these problems, including utilizing different types of metal layers, surface decontamination, and background gases and heat treatment, but they have all failed to provide a satisfactory ohmic contact. In addition, the transparency between the metal conductive layer and the p-GaN contact in the art cannot reach 100 percent. These and other shortcomings in the art have created a general need for an optimal semiconductor light emitting device structure, and more particularly, a novel and optimal structure for Gallium Ar Nitride (GaN)-based III-V compound semiconductor light emitting devices including LEDs and LDs.
SUMMARY OF THE INVENTION
According to a preferred embodiment of the present invention, there is provided a novel and optimal semiconductor light emitting device comprising a substrate, an n layer disposed co-extensively on the substrate, an n
++
layer disposed non-extensively and flush on one side of the n layer. Furthermore, a p
+
layer is disposed co-extensively on the n
+
layer of the device according to the invention, with a p layer further disposed co-extensively on the p
+
layer. A p cladding layer is disposed co-extensively on the p layer. A multiple quantum well (MQW) layer is disposed co-extensively on the p cladding layer, and an n cladding layer is further disposed co-extensively on the MQW layer. A second n layer is disposed co-extensively on the n cladding layer. An n
+
layer is disposed co-extensively on the second n layer of the device according to the invention. After partially etching the device, an n electrode is etched opposite n
++
layer non-extensively on the surface of n layer, and a second n electrode is formed non-extensively (without etching) upon the n
+
layer.
The invention provides a corresponding method for manufacturing a semiconductor light emitting device. This preferred embodiment of the method according to the invention comprises the steps of forming an n layer co-extensively on a substrate, forming an n
++
layer non-extensively and flush on one side of the n layer, forming a p
+
layer co-extensively on the n
++
layer, forming a p layer co-extensively on the p
+
layer, forming a p cladding layer co-extensively on the p layer, forming a multiple quantum well (MQW) layer co-extensively on the p cladding layer, forming an n cladding layer co-extensively on the MQW layer, forming a second n layer co-extensively on the n cladding layer, forming an n
+
layer co-extensively on the second n layer, partially etching the light emitting device, forming an n-electrode opposite said n
++
layer and non-extensively on the n layer, and forming a second n-electrode non-extensively on said n
+
layer.
The invention further provides an additional embodiment of a light-emitting diode (LED) according to the invention. The LED according to this particular embodiment includes a sapphire substrate having an

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