Gallium arsenide ISL gate with punched-through bipolar driver tr

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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357 13, 357 15, 357 22, 357 43, 357 58, 357 92, 307458, 307302, H01L 2704, H03K 19091

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active

044504683

ABSTRACT:
A gallium arsenide semiconductor integrated circuit having a driver transistor constructed as a normally-configured bipolar mode static induction transistor having an n.sup.+ source region provided in a main or outer surface thereof and having an n.sup.+ buried region which serves as a drain region thereof. A bipolar, an insulated gate field-effect transistor or a resistor may be employed as a load for the driver transistor. Both the driver transistor and the load are formed on a semi-insulating substrate, preferably a p-type high resistivity material. Schottky diodes may be provided at the output terminals of the driver transistor so that wired-OR and wired-NOR logic functions may be readily implemented.

REFERENCES:
patent: Re29971 (1979-04-01), Nishizawa et al.
patent: 4032962 (1977-06-01), Balyoz
patent: 4216490 (1980-08-01), Ohki
patent: 4234803 (1980-11-01), Nonaka
patent: 4317127 (1982-02-01), Nishizawa
Japan J. Appl. Physics, vol. 16, Suppl. 16-1, pp. 151-154, (1977), (357-392).
IEEE ISSCC, Dig. Tech. Papers, pp. 168-169, (Feb. 1975), Peltier, "C3L".

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