Gain error correction in an analog-to-digital converter

Coded data generation or conversion – Converter compensation

Reexamination Certificate

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C341S172000

Reexamination Certificate

active

07106229

ABSTRACT:
An error correction circuit for use with an analog-to-digital converter (ADC) comprising a first switch and a second switch and correction capacitor arranged in parallel and coupled to the first switch. The second switch is also coupled to ground and the correction capacitor is also coupled to a reference voltage wherein the first switch is arranged to be active during a hold mode of the ADC and the second switch is arranged to be active during a sample phase of the ADC.

REFERENCES:
patent: 5012247 (1991-04-01), Dillman
patent: 5852415 (1998-12-01), Cotter et al.
patent: 6433712 (2002-08-01), Ohnhaeuser et al.
patent: 6870496 (2005-03-01), Krymski et al.
patent: 2003/0063026 (2003-04-01), Nandy

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