Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
1999-02-25
2001-01-09
Wells, Kenneth B. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C327S077000
Reexamination Certificate
active
06172534
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a gain control arrangement and to a method for controlling the gain of a variable gain amplifier in dependence on the difference between the actual magnitude and the desired magnitude of a read signal provided over an optical data carrier read channel.
To recover data from optical data carriers, it is known to class the write/read channel of the data carrier in accordance with a partial response characteristic which approximates to the frequency response characteristics of the channel, and the arrangement or design of a digital data recovery circuit is selected to optimise data recovery from a channel with that partial response characteristic.
If the signal from the head assembly is to be equalised to more closely assume the partial response class, the choice of whether an analogue or digital equalising filter is used depends on whether it is desired to position the filter before or after the flash analogue-to-digital convertor (ADC) used for sampling the read signal in the read path. Typical partial response (PR) characteristics are PR(a, b, a), where a and b are constants in the overall equalised channel impulse response of a+bD+aD
2
, and PR(a, b, b, a), where a and b are constants in the overall equalised channel impulse response of a+bD+bD
2
+aD
3
. Here, D represents a unit delay operator.
The impulse response in combination with an appropriate coding scheme, such as for example 8, 16 efm+ or 1, 7 RLL, gives rise to a final stream of digital waveform samples which have a limited set of ideal values. For PR(a, b, a) channels there are four such levels whereas for PR(a, b, b, a) channels there are five. In optimally recovering data from channels of these and other types, the read signal is often operated on to be centred on an ADC code of zero, as the use of 2's complement digital schemes for data recovery is often preferred over other schemes. Following this centring, the read signal should be operated on by an automatic gain control (AGC) device which appropriately scales the amplitude of the read signal to allow optimum data recovery to be performed by way of a data slicer in the following data recovery circuit.
Increasing mismatch between the actual scale of amplitude and the desired scale of amplitude of the input read signal increases the probability of incorrectly decoding data. Conventional AGC devices used with partial response channels become operative only when a phase locked loop of the data recovery circuit has locked onto the frequency of the components of interest of the read signal. Once lock has occurred, the AGC device compares the digital amplitude value of the sampled read signal with the ideal amplitude value provided by the data slicer. The difference value obtained either is provided as a gain error value, or multiplied by an amount dependent on the ideal value provided by the data slicer, to provide a gain error value. Error values are accumulated over a number of sampling periods to generate a feedback error value which controls the gain of a variable gain amplifier (VGA) within the closed-loop AGC system to scale the amplitude of the read signal.
However, such conventional systems can suffer drawbacks in that any phase or frequency errors in the phase locked loop will result in erroneous gain error values. As the feedback error value will be erroneous as a result of this, correct gain adjustment, or gain lock, of the VGA may not occur, or occur only after many sample clock cycles. Also, such a system cannot be used for initial adjustment of the VGA gain necessary to take the read signal to a magnitude which is suitable for timing recovery by the phase locked loop to occur.
Furthermore, such a conventional AGC system can only produce meaningful gain error values when the actual magnitude of the amplitude of the read signal is close enough to the ideal amplitude magnitude that there are sufficiently few decision errors in the data slicer output to ensure correct phase and frequency lock. The gain need only be a few tens of percent below the ideal gain for gain lock to be unobtainable in, for example, PR(a, b, a) channel data recovery circuits.
SUMMARY OF THE INVENTION
In accordance with a first aspect of the present invention, there is provided a gain control arrangement, for controlling the gain of a variable gain amplifier in dependence on the difference between the actual magnitude and the desired magnitude of a read signal provided over an optical data carrier read channel, comprising:
means to sample the amplitude of the read signal at periodic sampling points to provide a sample value for each sampling point;
means to determine an envelope value having regard to the sample value at a sampling point and an envelope value determined at a preceding sampling point; and
means to determine a difference value corresponding to the difference between the envelope value and a desired envelope value, thereby providing a gain error value.
The envelope value determining means may comprise means to compare the sample value at a sampling point with an envelope value determined at a preceding sampling point; and means responsive to the comparison means to provide the larger of the compared values as the envelope value. Alternatively or in addition, the arrangement may further comprise means to subtract a predetermined value from the envelope value at a preceding sampling point to provide a decremented envelope value. If these features are present, the arrangement may further comprise means responsive when the comparison means shows the sample value to be lower than the envelope value at the preceding sampling point to provide the decremented envelope value as the envelope value.
Advantageously, the arrangement further comprises register means to provide the envelope value of a preceding sampling point from the envelope values and from a clock signal having a frequency equal to a frequency of the sampling points. The envelope determining means may further comprise rectifying means to provide the modulus of the sample value to the compare means.
Preferably, the variable gain amplifier is controlled to amplify an input signal by an amount dependent on at least one gain error value to provide the read signal.
In accordance with a second aspect of the present invention, a method of controlling the gain of a variable gain amplifier in dependence on the difference between the actual magnitude and the desired magnitude of a read signal provided over an optical data carrier read channel, comprises:
sampling the amplitude of the read signal at periodic sampling points to provide a sample value for each sampling point;
determining an envelope value with regard to the sample value at a sampling point and an envelope value determined at a preceding sampling point; and
determining a difference value corresponding to the difference between the envelope value and a desired envelope value, to thereby provide a gain error value.
The method may further comprise comparing the sample value at a sampling point with an envelope value determined at a preceding point; and providing the largest of the compared values as the envelope value. Alternatively or in addition, the method may further comprise the step of subtracting a predetermined value from the envelope value at a preceding sampling point to provide a decremented envelope value. If these steps are present, the method may further comprise the step of providing, when the comparing step shows the sample value to be lower than the envelope value at the preceding sampling point, the decremented envelope value as the envelope value.
The method may further comprise the step of delaying the envelope values by one clock period of a clock signal having a frequency equal to a frequency of the sampling points to provide the envelope value of a preceding sampling point.
The envelope determining step may further comprise rectifying the sample value to provide the modulus thereof for use in the comparing step. Preferably, the method further com
Dinh Paul
LSI Logistics Company
Maiorana P.C. Christopher P.
Wells Kenneth B.
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