Gain calibration circuitry for an analog to digital converter

Coded data generation or conversion – Converter calibration or testing

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341143, 341172, H03M 110

Patent

active

057450609

ABSTRACT:
A method, and apparatus, for calibrating a delta sigma modulator. The delta sigma modulator includes an integrating amplifier circuit with an integrating capacitor for producing an output indicative of an amount of charge held on the integration capacitor. During the calibration mode, a feedback signal sampling section samples a feedback signal and transfers packets of charge corresponding to such sampled feedback signal to the integrating capacitor in each modulator cycle and an input signal section samples a calibration signal and transfers packets of charge corresponding to a portion of the calibration signal to the integrating capacitor in each modulator cycle. With such an arrangement, some charge is transferred to the integration capacitor in each modulator cycle thus reducing idle-tones.

REFERENCES:
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patent: 5134401 (1992-07-01), McCartney et al.
patent: 5159341 (1992-10-01), McCartney et al.
patent: 5363102 (1994-11-01), Ferguson, Jr.
patent: 5510789 (1996-04-01), Lee
Analog Devices, 3V/5, CMOS, 500 .mu.A, Signal Conditioning ADC, AD7714, Oct. 1994.
Analog Devices, Lc.sup.2 MOS, Signal Conditioning ADC, AD7710, Jul. 1995.

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