Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor
Reexamination Certificate
2001-07-25
2003-10-07
Crane, Sara (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Junction field effect transistor
C257S289000
Reexamination Certificate
active
06630697
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the single crystal of GaAs as well as to a method of producing the same, and a semiconductor device utilizing the GaAs single crystal. In particular, the present invention is well suited to make uniform the characteristics of semiconductor elements which are fabricated in a wafer of GaAs semiconductor.
Among factors which scatter the characteristics of semiconductor elements fabricated in a wafer, those attributed to a crystal structure such as resistivity and FET (Field Effect Transistor) characteristics have heretofore been considered to be the distribution of etch pit densities and the ununiform distribution of an impurity substance within the wafer, but they have not been clarified yet. Reports on these factors having hitherto been made include the following:
(1): Yoshizumi TSUNODA, Masayoshi MATSUI and Takeshi YOKOYAMA
Bulletin of 30th Spring Symposium of Applied Physics Society (1983), 4p-D-10, p.437
(2): Yasunobu ISHII, Shintaro MIYAZAWA, Akira ISHIDA and Hajime YAMASAKI
Bulletin of 31st Spring Meeting of Applied Physics Society (1984), 1p-D-5, p.
(3): Yoshiro HIRAYAMA, Shintaro MIYAZAWA and Hajime YAMASAKI
Collection of Drafts of Lectures in 31st-Spring Symposium of Applied Physics Society (1984), 1p-D-6, p. 633
SUMMARY OF THE INVENTION
An object of the present invention is to provide the structure of a crystal in the shape of a wafer for making uniform the electrical characteristics of semiconductor elements to be fabricated in the wafer of a GaAs semiconductor single crystal, from a novel viewpoint, as well as a method of producing the same, and a semiconductor device utilizing the crystal.
The inventors have found out that, among factors which dominate the distribution of the characteristics of semiconductor elements fabricated in a GaAs single crystal wafer, an important one attributed to crystal structure is the distribution of the lattice constants of the GaAs single crystal in the wafer. For example, in case of fabricating field effect transistors (FETs), an intense correlation has been found out between the distribution of lattice distortions in the wafer and the distribution of the threshold voltages of the FETs, as will be described in detail later.
The present invention is based on such new knowledge, and achieves the uniformity of the characteristics of semiconductor elements by controlling the distribution of the lattice constants of a GaAs single crystal. At present, the inventors do not know any measure in which the distribution of lattice constants in a wafer is taken into consideration.
It is important for obtaining a semiconductor device satisfactorily functioning in practical use that the range of distribution in the wafer of a GaAs single crystal is set in a predetermined range.
More specifically, the range of the distribution D of lattice constants at a normal temperature i.e., room temperature in a wafer as measured with a region 1-100 mm
2
in area taken as one unit is set as follows:
D/d
o
≦4×10
−5
(1)
(where d
o
denotes the lattice constant of a GaAs single crystal of its stoichiometric composition at the normal temperature (23±1° C.), D=&Dgr;d
max
−&Dgr;d
min
holds with &Dgr;d
max
being the maximum value of &Dgr;d in the wafer and &Dgr;d
min
being the minimum value of &Dgr;d in the wafer, and &Dgr;d=(d−d
o
) holds in which d denotes the lattice constant of the GaAs wafer at the normal temperature).
In this regard, when the range of the distribution in the wafer is suppressed to be too small, the production of the GaAs single crystal becomes difficult, and the reproducibility of the production might be spoiled. It is accordingly reasonable that the range of the distribution in the wafer is at least 4×10
−6
.
By the way, in case of fabricating field effect transistors or the like using a GaAs single crystal wafer, it has been considered desirable to set the density of Si atoms of the GaAs single crystal to a value less than 1×10
15
cm
−3
. The inventors' study, however, has revealed that with GaAs single-crystals having hitherto been produced, the densities of Si atoms of which are not higher than 1×10
16
cm
−3
, none of the distributions of lattice constants in the wafers of the GaAs crystals satisfies the aforementioned equation (1) in terms of D/d
o
as shown by a lattice distortion distribution curve
1
in FIG.
1
.
That is, in the case of fabricating the FETs or the likes satisfactorily functioning in practical use by employing the GaAs single crystal, there has not been any GaAs single crystal which realizes the range of the distribution of lattice constants in the wafer thereof as meets the aforementioned equation (1). The present invention achieves uniformity in the characteristics of semiconductor devices, e.g., the threshold voltages thereof using a GaAs single crystal the density of contained Si atoms of which is at most 1×10
16
cm
−3
, this value permitting the semiconductor devices such as field effect transistors to function satisfactorily in practical use, and with which the distribution of lattice constants in the wafer of the single crystal satisfies the aforementioned equation (1).
In accordance with the present invention as described above, the range of distribution of the characteristics of semiconductor elements in a wafer can be sharply reduced, which can bring forth the effect of enhancing the production yields of ICs or LSIs in which the semiconductor elements are integrated at high densities. Besides, the invention is effective for the high speed operations of ICs and LSIs for the same reason.
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Ghandhi, S. VLSI Fabrication Principles, John Wiley, 1983, pp 86-90, 98-100.
Sze, S., Physics of Semiconductor Devices, John Wiley, 1981, p 33.
IEEE Transactions on Electron Devices, vo. ED-31, No. 8, Aug. 1984, pp 1057, para 4 5; New York, US; S. Miyazawa.
Journal of Crystal Growth, vol. 63 No. 2, Oct. 1983 pp 415-418, Amsterdam NL; Fornari Dislocation-free silicon-doped gallium arsenide grown by LEC Procedure.
Terashima “Control of Growth Parameters for Obtaining Highly Uniform Large Diameter LEC GaAs” 5th Conf. On Semi-insulating III-V Materials, 1988 pp 413-422.
Matsuoko et al “uniformity Evaluation of MESFETs for FGaAs LSI Fabrication” IEEE Trans. On Elec. Dev. vol. ED31, No. 8 Aug. 1984 pp 1062.
Applied Physics Letters, vol. 44, No. 1, Jan. 1984 pp 74-76 New York, US; Hunter “Carbon in Semi-Insulating, liquid Encapsulated Czochralski GaAs”.
Patent Abstracts of Japan, vol. 4, No. 173 (C-32) [655], Nov. 29, 1980; JP A-55-113-669 Sumitomo Feb. 9, 1980.
Fujisaki Yoshihisa
Ishiba Tsutomu
Takano Yukio
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