1986-09-19
1988-03-22
Carroll, James
357 16, 357 47, 357 55, 357 41, H01L 2980, H01L 29161, H01L 2702
Patent
active
047332832
ABSTRACT:
A method of manufacturing a GaAS semiconductor device of an E/D construction having a GaAs/AlGaAs heterojunction and utilizing a two-dimensional electron gas, which includes the steps of forming a heterojunction semiconductor substrate and etching a portion of the substrate to provide a gate portion of a depletion-mode FET. When the substrate of a semi-insulating GaAs layer, an undoped GaAs, an N-type AlGaAs layer providing an electron-supply layer, and a GaAs layer is formed, the GaAs layer is composed of a first GaAs layer, an etching stoppable AlGaAs layer, and a second GaAs layer, the first GaAs layer being formed on the N-type GaAs layer. The etching for provision of the gate portion is carried out by a dry etching method using an etchant of CCl.sub.2 F.sub.2 gas, so that the second GaAs layer can be etched but the AlGaAs layer cannot be etched. Thus, the thickness of the layers between a gate electrode of the depletion-mode FET and the GaAs/AlGaAs heterojunction plane is determined by the formation of the heterojunction substrate, and consequently a better uniformity of the threshold voltage of depletion-mode FET's is obtained.
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Carroll James
Fujitsu Limited
Ngo Ngan
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