GaAs power semiconductor device operating at a low voltage and m

Details GaAs power semiconductor device operating at a low voltage and m GaAs power semiconductor device operating at a low voltage and m

1997-03-19

1998-06-02

Meier, Stephen

Active solid-state devices (e.g., transistors, solid-state diode

Thin active physical layer which is

Heterojunction

H01L 2906, H01L 310328, H01L 310336, H01L 31072

Patent

active

057604185

ABSTRACT:
Disclosed is a GaAs power semiconductor device operating at a low voltage and a method for fabricating the device, the method comprising the steps of sequentially forming a first undoped GaAs buffer layer, a superlattice layer, a second undoped GaAs buffer layer, a channel layer and a surface passivation layer on a semi-insulating GaAs substrate; etching a plurality of layers formed on the substrate using a device isolating mask so as to electrically isolate elements; selectively etching the surface passivation layer to form contact holes for source/drain formation and forming ohmic metallic layers in the contact holes; sequentially removing the surface passivation layer and the channel layer to some deep extent to form a contact hole for gate formation between the source and the drain; forming a gate in the contact hole and at the same time forming source and drain electrodes on the ohmic metallic layers; depositing a first SiN layer over the gate, the source and drain electrodes and the surface passivation layer; selectively etching the first SiN layer so as to expose top surfaces only of the source and drain electrodes; plating a gold layer only on the source and drain electrodes; depositing a second SiN layer over the first SiN layer and the gold layer; and forming a gold coating layer on a rear surface of the substrate. In the device, parasitic carriers in interface between the substrate and the first undoped GaAs buffer layer can be prevented from being introduced into the channel layer by the superlattice layer during operation of the device.

REFERENCES:
patent: 4473939 (1984-10-01), Feng et al.
patent: 4717685 (1988-01-01), Nakajima
patent: 4870478 (1989-09-01), Weizel et al.
patent: 4939557 (1990-07-01), Pao et al.
patent: 4959326 (1990-09-01), Roman et al.
patent: 5343057 (1994-08-01), Gerard et al.
Voung et al "Sidegoing in a GaAs MBE--Grown MFET," IEEE Trans on Ed, vol. 37 No. 1, pp. 51-57, Jan. 1990.
Lee, et al.: "A GaAs Power Mesfet Operating at 3.3V Drain Voltage for Digital Hand-Held Phone"; ETRI Journal vol. 16, No. 4, Jan. 1995; pp. 1-9.
Lee, et al.: "2-9V Operation GaAs Power Mesfet with 31.5-dBM Output Power and 64% Power-Added Efficiency"; reprinted from IEEE Electron Device Ltrs. vol. 15, No. 9, Sep. 1994.
Lee, et al.: "2.3V Operation GaAs Power Mesfet with 68% Power-Added Efficiency"; GaAs IC Symposium (IEEE), pp. 133-136, 1994.

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