GaAs monolithic true logarithmic amplifier

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307242, 307571, 307497, 328145, G06G 724

Patent

active

048535648

ABSTRACT:
A GaAs monolithic true logarithmic amplifier which includes at least one amplifier stage common to the two arms of the circuit, the two arms being independent thereafter, one having lower gain and higher compression point and the other arm having higher gain and lower compression point. The signals in the arms are then recombined off-chip to provide the same effect as in the prior art. The circuit includes an input stage which amplifies and gain shapes the input signal and then splits the signal into upper and lower paths. The upper path is a relatively lower gain and higher compression point path whereas the lower path is a relatively higher gain and lower compression point path. The upper path includes a FET with a very large gate width whereas the lower path includes plural cascaded FETs, the last of which has a very small gate width. The upper and lower paths both have an odd or an even number of FETs to maintain the phase relation therebetween, the upper path further including transmission line stubs or elements which act as a delay line to compensate for the delay in the lower path due to the larger number of FETs therein. The outputs of the upper and lower paths are combined in a resistive combiner to provide the amplified signal. The output of this circuit is linear at low power and then demonstrates a knee therein at higher input power to resemble the curve of a logarithmic amplifier.

REFERENCES:
patent: 3129343 (1964-04-01), Logan
patent: 3373294 (1968-03-01), Fujinami
patent: 3448289 (1969-06-01), Harris
patent: 3492497 (1970-01-01), Gilmour et al.
patent: 3509368 (1967-04-01), Pedersen
patent: 4507615 (1985-03-01), Bateman

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