Fuse structures, methods of making and using the same, and...

Details Fuse structures, methods of making and using the same, and... Fuse structures, methods of making and using the same, and...

2005-05-24

2008-03-18

Doan, Theresa T (Department: 2814)

Semiconductor device manufacturing: process

Making device array and selectively interconnecting

With electrical circuit layout

C438S132000, C438S215000, C257S209000

Reexamination Certificate

active

07344924

ABSTRACT:
A fuse structure, an integrated circuit including the structure, and methods for making the structure and (re)configuring a circuit using the fuse. The fuse structure generally includes (a) a conductive structure with at least two circuit elements electrically coupled thereto, (b) a dielectric layer over the conductive structure, and (c) a first lens over both the first dielectric layer and the conductive structure configured to at least partially focus light onto the conductive structure. The method of making the structure generally includes the steps of (1) forming a conductive structure electrically coupled to first and second circuit elements, (2) forming a dielectric layer thereover, and (3) forming a lens on or over the dielectric layer and over the conductive structure, the lens being configured to at least partially focus light onto the conductive structure. The method of (re)configuring a circuit generally includes the steps of (i) irradiating at least one lens on or near a surface of the circuit sufficient to electrically disconnect a corresponding first fuse positioned under the lens and disable a first configuration of the circuit, and (ii) irradiating at least one other lens on or near the surface of the circuit sufficient to electrically disconnect a corresponding second fuse positioned under that lens and enable a second configuration of the circuit. The structure and methods advantageously provide fuse structures having improved reliability and smaller chip area, thereby increasing the yield of the manufacturing process and the numbers of die per wafer (both gross and good).

REFERENCES:
patent: 4795720 (1989-01-01), Kawanabe et al.
patent: 4920075 (1990-04-01), Morita
patent: 5872390 (1999-02-01), Lee et al.
patent: 6297541 (2001-10-01), Ema et al.
patent: 6420216 (2002-07-01), Clevenger et al.
patent: 6822309 (2004-11-01), Hirota
patent: 6902870 (2005-06-01), Aminpur et al.

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