Fuse-latch circuit having high integration density

Details Fuse-latch circuit having high integration density Fuse-latch circuit having high integration density

1998-12-10

2000-01-18

Zarabiun, A.

Static information storage and retrieval

Read only systems

Fusible

36523004, G11C 800

Patent

active

060162651

ABSTRACT:
A semiconductor IC apparatus including a fuse-latch unit. The fuse-latch unit comprises many fuses and latch output circuits. The fuses and the latch output circuits are arranged at pitches as short as possible, leaving virtually no dead spaces between them. The fuse-latch unit is therefore short in the direction the fuses and latch output circuits are arranged, thus occupying only a small area. The latch output circuits are arranged in two parallel columns. The fuses are arranged in one column extending between the two columns of latch output circuits. The fuses are connected, alternately to the latch output circuits of the first column and those of the second column.

REFERENCES:
patent: 5237532 (1993-08-01), Sahara
patent: 5473570 (1995-12-01), Sato

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