Patent
1985-12-11
1987-07-21
Carroll, J.
357 55, 357 59, 357 65, 357 68, H01L 2702, H01L 2906, H01L 2348
Patent
active
046822046
ABSTRACT:
A fuse element prepared from, for example, polycrystalline silicon is deposited on an insulating layer provided on the main surface of a semiconductor substrate in which an IC memory is formed. Connecting portions are integrally formed at both ends of the melting away portion of the fuse element. Each of the connecting portions has a stepped surface having stepped sections. The stepped surface is tightly contacted with a stepped surface having stepped sections formed on the insulating layer.
REFERENCES:
patent: 3564354 (1971-02-01), Aoki et al.
patent: 3767981 (1973-10-01), Polata
patent: 3792319 (1974-02-01), Tsang
patent: 4023197 (1977-05-01), Nagdo et al.
patent: 4151546 (1979-04-01), Kawagai et al.
patent: 4209894 (1980-07-01), Keen
patent: 4267633 (1981-05-01), Seiler
Rand, "Reliability of LSI Memory Circuits Exposed to Laser Cutting"; Electro Scientific Industries, Inc., Technical Article TA-34; Apr. 1979.
Nishimura Hidetaro
Shiozaki Masakazu
Carroll J.
Tokyo Shibaura Denki Kabushiki Kaisha
LandOfFree
Fuse element for integrated circuit memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Fuse element for integrated circuit memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fuse element for integrated circuit memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-211072