Fuse detection circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Fusible link or intentional destruct circuit

Reexamination Certificate

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Details

C365S225700

Reexamination Certificate

active

06919754

ABSTRACT:
There is provided a fuse detection circuit comprising a first inverter circuit comprising a PMOS transistor (P2) and an NMOS transistor (N2) having gates connected in common and connected to the first node (A); a second inverter circuit comprising a PMOS transistor (P1) and an NMOS transistor (N1) having gates connected in common and connected to the second node (B); and a third NMOS transistor (N3) having a drain and source connected between the third node (C) and the ground potential, and a gate connected with the control signal, wherein the control signal is set to a predetermined level in an initial state to precharge the node (A),(B) and thereafter a molten state of a fuse is detected in accordance with a potential level of the second node (B) at a change in the level of the control signal.

REFERENCES:
patent: 6498526 (2002-12-01), Lim et al.
patent: 6842367 (2005-01-01), Hidaka
patent: 10-062477 (1998-03-01), None
patent: 2001-13224 (2001-01-01), None

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