1976-07-06
1977-12-13
Wojciechowicz, Edward J.
357 23, 357 41, 357 46, H01L 2978, H01L 2702
Patent
active
040632733
ABSTRACT:
A logic circuit has the individual elements arranged in a semiconductor layer. The elements are in the form of field effect transistors having a multiple gate and bipolar transistors having a multiple emitter. The multiple gates of the field effect transistor represent the inputs of the fundamental logic circuit, and at least one emitter of the multiple emitters of the bipolar transistor represents the output of the fundamental logic circuit. The elements are arranged in the semiconductor layer in such a manner that a first supply voltage potential can be connected to the semiconductor layer. One configuration of the multiple gates of the field effect transistor identifies the circuit as a NAND circuit, while another configuration of the gates identifies the circuit as a NOR circuit. An additional element, a bipolar transistor, may be formed in the semiconductor layer and be connected to an emitter of the multiple emitter transistor to provide a power output stage in a Darlington configuration.
REFERENCES:
patent: 3639787 (1972-02-01), Lee
Siemens Aktiengesellschaft
Wojciechowicz Edward J.
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