Fully scalable computer architecture

Details Fully scalable computer architecture Fully scalable computer architecture

2006-02-07

2006-02-07

Paladini, Albert W. (Department: 2125)

Data processing: structural design, modeling, simulation, and em

Structural design

C712S011000, C712S015000, C712S016000

Reexamination Certificate

active

06996504

ABSTRACT:
A scalable computer architecture capable of performing fully scalable simulations includes a plurality of processing elements (PEs) and a plurality of interconnections between the PEs. In this regard, the interconnections can interconnect each processing element to each neighboring processing element located adjacent the respective processing element, and further interconnect at least one processing element to at least one other processing element located remote from the respective at least one processing element. For example, the interconnections can interconnect the plurality of processing elements according to a fractal-type method or a quenched random method. Further, the plurality of interconnections can include at least one interconnection at each length scale of the plurality of processing elements.

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