Fully-integrated high-speed interleaved voltage-controlled ring

Details Fully-integrated high-speed interleaved voltage-controlled ring Fully-integrated high-speed interleaved voltage-controlled ring

1997-05-12

1998-11-24

Mis, David

Oscillators

Ring oscillators

331 45, 331177R, H03B 524

Patent

active

058413251

ABSTRACT:
An interleaved, tunable ring oscillator is disclosed that produces more output phases without resorting to interpolation. The oscillator is inherently symmetrical and suffers from none of the systematic time errors of an interpolator approach. The oscillator stages are interconnected to allow the oscillating frequency to be higher than the conventional limit of 1/(2*N*T.sub.D). Frequency tuning is accomplished by electronically varying the delay of each stage of the ring oscillator. A mixer cell performs a weighted sum of a first input and a second delayed input. The delay ranges from the delay of the mixer itself to the sum of the delays of the mixer and the delay cell.

REFERENCES:
patent: 4884041 (1989-11-01), Walker
patent: 5592126 (1997-01-01), Boudewijns et al.
patent: 5592127 (1997-01-01), Mizuno
Maneatis, John G. et al, "Precise Delay Generation Using Coupled Oscillators", IEEE Jounal of Solid-State Circuits, vol. 28, No. 12, Dec. 1993. pp. 1273-1293.
Rofougaran, Ahmadraza et al., "A 900MHz CMOS LC-Oscillator with Quadrature Outputs", 1996 IEEE International Solid-State Circuits Conference, ISSCC96, Session 24, Analog Technologies, Paper SP 24.6, pp. 392-393.
Knotts, Thomas A. et al., "A 500MHz Time Digitizer IC with 15.625ps Resolution", 1994 IEEE International Solid-State Circuits Conference, ISSCC94, Session 3, Analog Technologies, Paper WP 3.6 pp. 58-59.

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