Fully digital data separator and frequency multiplier

Details Fully digital data separator and frequency multiplier Fully digital data separator and frequency multiplier

1995-04-20

1997-01-07

Chin, Wellington

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

375359, 375360, 375371, 375373, 375375, 375376, 327156, 327160, 327166, H04L 2706, H04L 702, H04L 700

Patent

active

055925154

ABSTRACT:
The data separator of this invention may be used for extracting clock and data signals from a serial stream of bits read from a magnetic disk or tape. The data separator is supplied with a "fast" clock pulse generated by a frequency multiplexer. After a lock indication from the frequency multiplier, during the first eight serial data pulses the frequency and phase of the data separator are synchronized to the serial data pulses. Then an early and late logic unit keeps track digitally of the cumulative phase difference between the incoming data stream and the output of the data separator. When the cumulative phase difference reaches predetermined limits, the phase of the output is adjusted. If a second phase adjustment is required in the same direction (i.e., early or late), the frequency of the output is adjusted. The output of the data separator is generated by a decrementing register, the phase or frequency of the data separator being adjusted by increasing or decreasing the initial value loaded into the decrementing register. The data separator is fully digital.

REFERENCES:
patent: 4133978 (1979-01-01), Hewlett
patent: 4472818 (1984-09-01), Zapisek
patent: 4520408 (1985-05-01), Velasquez
patent: 4584695 (1986-04-01), Wong et al.
patent: 4633488 (1986-12-01), Shaw
patent: 4641048 (1987-02-01), Pollock
patent: 4742403 (1988-05-01), Troletti
patent: 4780844 (1988-10-01), Keller
patent: 4796280 (1989-01-01), Nesin
patent: 4808884 (1989-02-01), Hull
patent: 4908841 (1990-03-01), Leis
patent: 5015970 (1991-05-01), Williams et al.
patent: 5087842 (1992-02-01), Pulsipher et al.
patent: 5140620 (1992-08-01), Woodward
patent: 5148113 (1992-09-01), Wight et al.
patent: 5170297 (1992-12-01), Wahler
patent: 5216301 (1993-06-01), Gleeson, III et al.
patent: 5243227 (1993-09-01), Gutierrez, Jr. et al.
patent: 5257294 (1993-10-01), Pinto et al.
patent: 5331294 (1994-07-01), Watanabe et al.
patent: 5349311 (1994-09-01), Mentzer
patent: 5382921 (1995-01-01), Estrada et al.
L. A. Laurich et al., "Phase Lock Loop With Delay Line Oscillator", IBM Technical Disclosure Bulletin, vol. 13, No. 7, Dec. 1970, pp. 1863-1864.
L. A. Laurich, "Phase Lock Loop With Variable Delay Line Oscillator", IBM Technical Disclosure Bulletin, vol. 13, No. 7, Dec. 1970, pp. 1861-1862.
J. Sonntag et al., "A Monolithic CMOS 10MHz DPLL for Burst-Mode Data Retiming", ISSCC Dig. Tech. Papers, Feb. 16, 1990, pp. 194-195.
B. Kim et al., "A 30-MHz Hybrid Analog/Digital Clock Recovery Circuit in 2-.mu.m CMOS", IEEE Journal of Solid-State Circuits, vol. 25, No. 6, Dec. 1990, pp. 1385-1394.
M. Bazes et al., "A Novel CMOS Digital Clock and Data Decoder", IEEE Journal of Solid-State Circuits, vol. 27, No. 12, Dec. 1992, pp. 1934-1940.
S. Miyazawa et al., "A BiCMOS PLL-Based Data Separator Circuit with High Stability and Accuracy", IEEE Journal of Solid-State Circuits, vol. 26, No. 2, Feb. 1991, pp. 116-121.
T. H. Lee et al., "A 155-MHz Clock Recovery Delay-and Phase-Locked Loop", IEEE Journal of Solid-State Circuits, vol. 27, No. 12, Dec. 1992, pp. 1736-1746.
F. Lu et al., "A 700-MHz 24-b Pipelined Accumulator in 1.2-.mu.m CMOS for Application as a Numerically Controlled Oscillator", IEEE Journal of Solid-State Circuits, vol. 28, No. 8, Aug. 1993, pp. 878-885.
Floppy Disk Data Separator Design Guide for the DP8473, Application note No. 5, National Semiconductor Corporation, 1989, pp. 1-29.

Affiliated with

Also associated with

Rating

Fully digital data separator and frequency multiplier does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Fully digital data separator and frequency multiplier, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fully digital data separator and frequency multiplier will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1771142