Fully digital control and drive combination IC with on-board...

Electricity: motive power systems – Positional servo systems – With particular 'error-detecting' means

Reexamination Certificate

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Details

C318S560000, C360S069000, C360S073030

Reexamination Certificate

active

06566838

ABSTRACT:

FIELD OF THE INVENTION
The present invention generally relates to mass memory drives with disk type support for data storage, and more particularly, to a combined or monolithically integrated combination device including an on-board digital signal processor (DSP) for driving and controlling a first motor of rotation of the disk and at least a second voice coil motor (VCM) for positioning at least a read/write head.
BACKGROUND OF THE INVENTION
Economy and miniaturization stimulates the realization of integrated devices containing analog circuits, digital drive and control circuits, as well as output power stages for driving a multiphase brushless motor that rotates a disk and at least a second voice coil motor that moves a hinged arm carrying a read/write head. A functional diagram of a combination device for driving and controlling a hard disk drive (HDD) of a personal computer (PC) is depicted in FIG.
1
.
The block SMOOTH DRIVE manages the command and the control of a DC motor, which is typically a brushless multiphase motor, such as a three-phase motor, for example. The block VCM DRIVE manages the driving and the control of a voice coil motor (VCM) for positioning the arm carrying the head, the winding of which is represented by the load LOAD.
In the depicted example, the integrated circuit IC includes also a third block, identified as RAMP LOADING that implements a certain algorithm for controlling the speed of the voice coil motor to optimize unloading and loading operations of the swinging arm. The swinging arm carries the head from a parking ramp on which the arm is brought to rest to avoid undesired impacts of the head against the surface of the disk when transporting the apparatus.
More specifically, the block SMOOTH DRIVE contains a register KVAL containing the output value of the control algorithm for the rotation speed of the brushless motor carried out by an external microprocessor. The IC is interfaced to the microprocessor through a suitable interface block SERIAL & CONTROL INTERFACE. The external microprocessor programs a second register called TORQUE OPTIMIZER to optimize the timing of the switching through the different driving phases in synchronization with the angular position of the rotor to ensure maximum efficiency.
A third register called INDUCTIVE SENSING contains the current angular position of the rotor of the motor as estimated by the external microprocessor. Information is used to quicken the start-up of the motor from rest toward the programmed speed. In contrast, the block that drives and control the voice coil motor VCM DRIVE commonly comprises a linear current mode control loop with a related summation stage and analog compensation filter, identified by the block ERR_AMP & FILTER.
Notably, these combination drive and control devices place a significant burden on the external microprocessor for implementing the various functions. A fully digital embodiment of all the functions performed by a combination device of this kind would allow a reduction of the number of operations to be carried out by the external microprocessor. This reduction is further achieved if the integrated circuit would include local digital processing, or even better, a finite state machine provided with banks of input/output registers and a working memory. The finite state machine is usually defined as a digital signal processor (DSP).
The presence in the combination drive IC of a DSP core, having its own program memory, allows variation and adaption of the control system to specific needs of the user and to different HDD systems. This makes drive and control functions faster and reduces the burden on the external system's microprocessor by locally implementing faster control loops.
SUMMARY OF THE INVENTION
A main objective of the present invention is to provide an integrated device including a DSP core for managing and/or actuating a plurality of command and control functions for a multiphase brushless motor for rotation of a disk storage support, and for at least a voice coil motor for positioning at least a read/write head over a rotating disk. Analog circuitry is almost completely eliminated compared to known combination devices. Eliminated analog circuitry includes, for example, the error amplifier and the relative compensation filter of the voice coil motor feedback loop, and analog circuitry supporting interleaved control algorithms implying a certain priority scheme in carrying out the different functions for avoiding conflicts.
According to the present invention, instead of driving the voice coil motor according to the common approach of a linear current mode control by feeding the signal output by an error amplifier and filtering by an analog filter, a power stage including four power devices in a full bridge configuration functioning in a switched mode is employed for driving the voice coil motor. The driving of the bridge stage is done according to a phase shift modulation (PSM) of two driving phases or signals that control the switching of the four power devices.
A first important aspect of the present invention is that the current mode control loop of the voice coil motor, with the exception of the amplifier detecting the current flowing in the winding of the motor, is digitally implemented by using the on-chip digital signal processor for performing the functions of the error amplifier and of a loop filter.
Even the control loop of the angular position of the rotor of the voice coil motor is substantially implemented in a digital form using the on-chip DSP and advantageously sharing part of the functional blocks with the current mode drive control loop. The integrated circuit of the invention includes a serial interface to communicate according to a certain protocol, such as the I
2
C protocol, for example, with a system's microprocessor.
The invention is more precisely defined in the attached claim 1 and a particularly effective embodiment is defined in dependent claim 2.


REFERENCES:
patent: 5384524 (1995-01-01), Romano
patent: 5420730 (1995-05-01), Moon et al.
patent: 5491395 (1996-02-01), Hutsell et al.
patent: 5936787 (1999-08-01), Ohmi
patent: 6208280 (2001-03-01), Baker et al.
patent: 6285521 (2001-09-01), Hussein
patent: 6445661 (2002-09-01), Wu

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