Fully differential sample and hold adder circuit

Details Fully differential sample and hold adder circuit Fully differential sample and hold adder circuit

1990-10-19

1992-09-01

LaRoche, Eugene R.

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307494, 307596, H03K 5153, H03K 522, H03K 5159

Patent

active

051441608

ABSTRACT:
A fully differential sample and hold, switched-capacitor adder circuit is disclosed, where a single-ended and fully differential signals can be added together. Thus in one single operation, the adder circuit performs two functions conventionally performed by two separate circuits: converting the single-ended voltage signal into fully differential; and adding this converted differential signal to another differential signal. The adder circuit includes an operational amplifier, capacitors and switches for performing the operation. The circuit is economical when implemented in silicon.

REFERENCES:
patent: 4553052 (1985-11-01), Takahashi
patent: 4587443 (1986-05-01), Van De Plassche
patent: 4707624 (1987-11-01), Yee
patent: 4899068 (1990-02-01), Klose et al.
patent: 4988900 (1991-01-01), Fensch
patent: 5028815 (1991-07-01), Van De Plassche
Nicollini et al., "A Fully Differential Sample and Hold Circuit for High-Speed Applications," IEEE Journal of Solid-State Circuits, vol. 24, No. 5, 1989.
Yung et al., "A Ratio-Independent Cyclic A/D Conversion Technique," IEEE International Symposium on Circuits and Systems, vol. 3, Jun. 1988, pp. 2581-2584.

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