Fully differential non-linear amplifier

Details Fully differential non-linear amplifier Fully differential non-linear amplifier

1988-06-30

1989-07-18

Mullins, James B.

Amplifiers

Signal feedback

Nonlinear impedance element in loop path

307562, 330260, H03F 345

Patent

active

048497088

ABSTRACT:
A fully differential non-linear amplifier includes an operational amplifier (12), a first input resistor (R1), a second input resistor (R2), a first feedback resistor (R3), a second feedback resistor (R4), a first clamping network (CN1), and a second clamping network (CN2). The first clamping network (CN1) is formed of a first P-channel clamping transistor (P10) and a first N-channel clamping transistor (N10). The second clamping network (CN2) is formed of a second P-channel clamping transistor (P12) and a second N-channel clamping transistor (N12). The gates of the first and second P-channel clamping transistors (P10, P12) are connected to receive a P-bias signal. The gates of the first and second N-channel clamping transistors (N10, N12) are connected to receive a N-bias signal. The non-linear amplifier clamps its differential output signal to a constant voltage level independent of variations in process and temperature.

REFERENCES:
"Fet Limits and Resets Operational Amplifiers", Electronic Design, Nov. 8, 1963, pp. 54-56.

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