Fully differential interpolating comparator bank and method

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341158, H03M 112, H03M 134

Patent

active

060140976

ABSTRACT:
An interpolating comparator bank having first and second differential amplifiers, each having a differential input and a differential output and first, second and third comparator circuits, each having differential inputs. The differential output of the first differential amplifier and second differential amplifier are coupled to the first and second comparator inputs, respectively. The differential outputs of the first and second differential amplifiers are also both coupled to the differential input of the second comparator circuit. In analog to digital converter circuit applications, the first and second comparators function to provide outputs indicative of the magnitude of a differential input voltage relative to first and third differential reference voltages produced, for example, by a resistor network. The second comparator circuit provides an output indicative of the magnitude of the differential input relative to a second differential input voltage which is not produced by the resistor network but which has a magnitude intermediate that of the first and second differential reference voltages.

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A 10-b 20-MHz 30-mW Pipelined Interpolating CMOS ADC, Keiichi Kusumoto, Akira Matsuzawa, Member, IEEE, and Kenji Murata, IEEE Journal of Solid-State Circuits, vol. 28, No. 12, Dec., 1993, pp. 1200-1206.

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