Amplifiers – With semiconductor amplifying device – Including differential amplifier
Patent
1992-05-05
1994-01-25
Mottola, Steven
Amplifiers
With semiconductor amplifying device
Including differential amplifier
330258, H03F 345
Patent
active
052819248
DESCRIPTION:
BRIEF SUMMARY
The present invention concerns a fully differential power amplifier implemented as an integrated circuit in CMOS technology operating with one single power supply voltage, e.g. 5 V; The chip on which the circuit is integrated contains also a digital part.
The amplifier according to the invention is able to drive a low impedance load in order of a few hundreds ohms with a low harmonic distortion and a wide output dynamic range, e.g. 4 Vpp (peak to peak voltage) if a 5 V power supply is used. The amplifier according to the invention is useful in those cases where it is necessary to drive low impedance loads with a wide dynamic range in relationship to the power supply voltage, low distortion and high common mode rejection ratio as well as a low power consumption.
The circuit in this preferred application drive a mixer, for RF carrier modulation in a telecommunication system.
The U.S. Pat. No. 4,794,349 patent describes a differential power amplifier with three cascaded stages, one input stage, one gain stage and one output stage, respectively. This well known circuit has some drawbacks and limitations that make the circuit unsuitable for the above mentioned tasks.
More precisely, the gain stage layout is not perfectly symmetric and may give rise to output distortions in case of mismatch between the gains of the two differential input stages. Besides the high complexity of this stage considerably limits the circuit bandwidth.
The output stage configuration according to the U.S. Pat. '349 needs a control circuit to limit the rest current variations of the transistors in the two extreme branches, associated to possible technological inaccuracies in the integrating process.
Finally, the circuit according to the U.S. Pat. '349 has a high power consumption even in idle state, which makes it improper to be used with battery power supply. In contrast, the purpose of this invention is to obtain a substantially fully differential power amplifier overcoming the limitations of the former technique and in particular a power amplifier having wide dynamic range as well as a good Power Supply Rejection Ratio (PSRR) and low power consumption.
The preferred structure exhibits high noise rejection so that it is possible to integrate the circuit in a chip that also contains a digital part. The circuitry layout is fully symmetrical with respect to the two differential paths and permits a symmetrical layout from a geometrical point of view.
This symmetric differential path aspect of the preferred embodiment is very important to the objective of high rejection of the noise coming from the substrate and the power supply lines, mainly caused by switching of the digital part. Said noise affect the two differential paths substantially identical and is translated into substantially only common mode noise, while the differential signal is not substantially affected of any noise.
These purposes are obtained by means of the preferred embodiment of invention that consists in a fully differential CMOS power amplifier comprising:
one input stage of the folded-cascode type having two input terminals;
one AB class output voltage stage, the inputs of which are connected to outputs of said input stage, respectively;
a first common mode feedback circuit connected between the output of said input stage and an internal node of said input stage;
a second common mode feedback circuit associated to said output stage;
characterized by the fact that said second common mode feedback circuit is connected between the output of said output stage and an internal low impedance junction thereof, so as to produce a reduction of the common mode signal at the output of the amplifier by injection of two feedback currents;
and by the fact that said power amplifier comprises a power dissipation reduction circuit which during the idle periods of the amplifier is able to connect both said outputs of the output stage to a voltage reference through a pair of controlled switches and thereafter, after a predetermined delay, to turn off the whole amplifier through a plural
REFERENCES:
patent: 4658219 (1987-04-01), Saari et al.
patent: 4794349 (1988-12-01), Senderowicz et al.
Journal of Solid-State Circuits, Jun. 24, 1989, No. 3, New York, U.S. "A Floating CMOS Bandgap Voltage Reference for Differential Applications".
Gazzoli Giuseppe
Maloberti Franco
Palmisano Giuseppe
Sforzini Luigi
Italtel Societa Italiana Telecomunicazione S.p.A.
Mottola Steven
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