Fully CMOS-type SRAM device and method for fabricating the same

Details Fully CMOS-type SRAM device and method for fabricating the same Fully CMOS-type SRAM device and method for fabricating the same

1994-06-15

1995-10-24

Thomas, Tom

Fishing, trapping, and vermin destroying

437 48, 437 56, 437 57, 437915, H01L 218244

Patent

active

054609950

ABSTRACT:
A grounding wiring layer is provided on the substantially entire region between driver MOS transistors and load MOS thin film transistors of a flip-flop type memory cell. The contact holes for connecting the gate electrodes of the MOS thin film transistors with storage nodes are formed by providing a side wall on the inner wall of each of the contact hole portions formed in the grounding wiring layer and inter-layer insulating films sandwiching it. Thus, the impedance of the grounding wiring layer can be reduced to stabilize the operation of a miniaturized SRAM memory cell using the load MOS thin film transistors. The resistance against for software error caused by .alpha.-ray can also be improved.

REFERENCES:
patent: 4272880 (1981-06-01), Pashley
patent: 4980732 (1990-12-01), Okazawa
patent: 5132771 (1992-07-01), Yamanaka et al.
"A Memory Cell with Polysilicon Thin Film Transistor (TFT) for a 4Mbit SRAM", Kazuhito Tsutsumi et al., Singaku Giho, vol. 90, No. 48, pp. 7-13 (SMD90-25).

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