Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
2000-09-06
2002-08-13
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S085000, C330S110000, C330S311000
Reexamination Certificate
active
06433638
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to the field of electronic devices, and in particular, to transimpedance amplifiers.
2. Background Information
Transimpedance amplifiers are known. Fully balanced or differential transimpedance amplifiers are utilized in a variety of applications where it is desirable to convert a current-varying signal into a voltage-varying signal. One such application is within optical receiver systems where the transimpedance amplifier is used to convert the current-varying output signal of a photodetector into a voltage signal that is processed by other circuitry. Although fully balanced or differential transimpedance amplifiers are typically associated with favorable power supply rejection characteristics, they are also often characterized with a relatively low voltage gain, a large low-cutoff frequency, poor noise performance, limited dynamic range, and/or a low bandwidth.
U.S. Pat. No. 5,343,160, by Stewart S. Taylor, entitled “FULLY BALANCED TRANSIMPEDANCE AMPLIFIER WITH LOW NOISE AND WIDE BANDWIDTH” issued Aug. 30, 1994, describes (Abstract) a circuit implementing a fully balanced (differential) transimpedance amplifier with low-noise and wide bandwidth, accomplished by direct coupling the feedback resistors from the outputs of the amplifier to the inputs without the use of a blocking capacitor. An implementation of this transimpedance amplifier device is shown in FIG.
2
. As described in the patent, the transimpedance amplifier circuit includes two single-ended input amplifiers that form a first stage and a differential amplifier that forms a second stage common to both input amplifiers. A transistor
210
and a resistor
211
form one input amplifier while transistor
213
and resistor
214
form the other input amplifier. Capacitors
216
and
217
couple the input signal to each input amplifier.
The second stage consists of a differential pair of transistors
220
and
221
and load resistors
222
and
223
. Transistors
225
,
226
and
227
and diodes
230
,
231
and
232
provide proper bias to transistors
220
and
221
with common-mode feedback. This biasing is necessary in some cases to lower the common-mode gain of transistors
220
and
221
since there is an undesired positive common-mode feedback loop around the entire amplifier. Transistors
225
and
226
and diodes
230
-
232
are biased with current from transistor
235
. Transistors
210
and
213
are biased with common-mode feedback from transistors
220
,
221
,
237
, diodes
238
and
239
, and resistors
241
and
242
. Biasing current is provided by resistors
245
and
247
and transistor
246
. Resistors
241
and
242
and capacitors
216
and
217
are chosen consistent with the low frequency cutoff of the circuit and with the size limitations of the integrated circuit. Resistors
241
and
242
should be much larger than feedback resistors
260
and
261
to ensure good noise performance.
The photodetector (MSM in this case) is modeled by current source
250
and capacitor
251
. The voltage offset means are implemented with source follower transistors
255
and
256
and level-shifting diodes
257
,
258
and
259
. Transistors
256
and
285
provide bias current to level-shifting diodes
257
-
259
. Feedback resistors
260
and
261
couple the offset output signals back to the inputs of the photodetector. The output can be taken from the sources or gates of transistors
255
and
256
, or from the offset means diodes
257
,
258
and
259
.
However, a least one drawback of the arrangement described in the patent is that it uses two input capacitors (
216
,
217
) which disadvantageously requires four times as much capacitor area. This is clearly a disadvantage because such space is at a premium in integrated circuitry. Another drawback with the U.S. Pat. No. 5,343,160 patented transimpedance amplifier is that it requires compensation to achieve stability.
Therefore, a need exists for an amplifier which allows for single integrated capacitor coupling, for high bandwidth, low noise, low voltage operation with an integrated detector, that does not have the disadvantages of existing circuits.
SUMMARY OF THE INVENTION
It is, therefore, a principle object of this invention to provide a fully balanced transimpedance amplifier for high speed and low voltage applications.
It is another object of the invention to provide a fully balanced transimpedance amplifier for high speed and low voltage applications that solves the above mentioned problems so that single integrated capacitor coupling, for high bandwidth, low noise, low voltage operation with an integrated detector is achieved.
These and other objects of the present invention are accomplished by the method and apparatus disclosed herein.
According to an aspect of the invention, a fully balanced transimpedance amplifier for high speed and low voltage applications is provided.
According to an aspect of the invention, an amplifier which allows for single integrated capacitor coupling, for high bandwidth, low noise, low voltage operation with an integrated detector is provided.
According to another aspect of the invention, an input stage of the amplifier uses a matched pair of common source connected transistors with sources tied directly to ground to eliminate the Vds overhead usually found in differential pairs. Ground connection minimizes a source resistance noise component, while matching minimizes power supply noise generation and susceptibility for an array of amplifiers.
According to another aspect of the invention, feedback resistors along with diode connected MESFETS determine the transimpedance of the amplifier. The nonlinearity of diodes helps to soften clipping. Transresistance also determines the noise generated by the amplifier. Diode connected MESFETS offer lower noise than resistors for the same impedance.
According to another aspect of the invention, stability is achieved through use of only a single stage of gain in a loop of the input stage. Therefore, in contrast with the patented transimpedance amplifier referred to in the Background section above (U.S. Pat. No. 5,343,160), no additional compensation is required to achieve stability.
According to another aspect of the invention, additional gain is achieved through cascading in the input stage.
According to another aspect of the invention, a differential stage minimizes any difference in amplitude between two sides of the amplifier input stage.
According to another aspect of the invention, two stages of source followers provide buffering to drive a relatively low impedance load, e.g., a 50 Ohm load at the output of the amplifier.
These and other aspects of the invention will become apparent from the detailed description set forth below.
REFERENCES:
patent: 5039952 (1991-08-01), Dreps et al.
patent: 5343160 (1994-08-01), Taylor
patent: 5606288 (1997-02-01), Prentice
patent: 5777507 (1998-07-01), Kaminishi et al.
patent: 5900779 (1999-05-01), Giacomini
patent: 6163235 (2000-12-01), Klemmer
patent: 6307196 (2001-10-01), Thompson et al.
Heineke Randolph B.
Olson Scott Allen
Swart David Peter
Swift Gerald Wayne
Bussan Matthew J.
International Business Machines - Corporation
Lynt Christopher H.
Nguyen Patricia T.
Pascal Robert
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