Full rate error detection circuit for use with external...

Details Full rate error detection circuit for use with external... Full rate error detection circuit for use with external...

2006-05-09

2006-05-09

Fan, Chieh M. (Department: 2634)

Pulse or digital communications

Receivers

Automatic baseline or threshold adjustment

C375S316000, C375S329000

Reexamination Certificate

active

07042961

ABSTRACT:
A system and method are provided for selecting an optimal threshold detection level for a single serial data input receiver. The method comprises: receiving a serial data stream of pseudorandom binary information; using a plurality of threshold detection levels, estimating bit values; comparing the differences between estimated bit values; and, adjusting the threshold levels to minimize the difference between comparisons of estimated bit values. In some aspects, comparing the differences between estimated bit values includes: counting a first number of differences between the first and third thresholds; counting a second number of differences between the second and third thresholds; and, adjusting the first and second thresholds until the first number equals the second number.

REFERENCES:
patent: 3670304 (1972-06-01), Andresen et al.
patent: 6363049 (2002-03-01), Chung

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