Full flash analog-to-digital converter

Details Full flash analog-to-digital converter Full flash analog-to-digital converter

1991-02-26

1992-06-02

Pellinen, A. D.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

341160, H03M 136

Patent

active

051190982

ABSTRACT:
A full flash analog-to-digital converter has a plurality of comparators for comparing an analog input voltage with respective reference voltages, a first-stage encoder for generating low-order bits based on output signals from the comparators, and a second-stage encoder for generating high-order bits based on the low-order bits generated by the first-stage encoder. The first-stage encoder generates a complement bit of the highest-order bit of the low-order bits generated by the first-stage encoder. The second-stage encoder generates the high-order bits based on the highest-order bit and the complement bit. Alternatively, the full flash analog-to-digital converter has an encoder for generating a plurality of bits based on output signals from the comparators. The encoder generates an additional bit by ORing the AND logical product of complement bits of second and third low-order bits of the plurality of bits, and a complement bit of a first low-order bit of the plurality of bits. The additional bit and a complement bit of the additional bit and ANDed by a logic circuit, and an error pattern in the output signals from the comparators is detected based on an output signal from the logic circuit.

REFERENCES:
patent: 4276543 (1981-06-01), Miller et al.
patent: 4591825 (1986-05-01), Bucklen
patent: 4596978 (1986-06-01), Fujita
patent: 4617549 (1986-10-01), Reiner
patent: 4774498 (1988-09-01), Traa
patent: 4897657 (1990-01-01), Brubaker

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