Full adder

Details Full adder Full adder

1984-01-25

1986-07-15

Malzahn, David H.

Boots, shoes, and leggings

G06F 750

Patent

active

046010076

ABSTRACT:
A full adder is constituted with complementary MOS FETs, wherein delay time of adding time and carry signal delay time are shortened as a result of reduced number of stages of signal processing gates.

REFERENCES:
patent: 4071905 (1978-01-01), Oguchi et al.
patent: 4422157 (1983-12-01), Uhlenhoff
patent: 4449197 (1984-05-01), Henry et al.
patent: 4471454 (1984-09-01), Dearden et al.
patent: 4541067 (1985-09-01), Whitaker
patent: 4547863 (1985-10-01), Colardelle

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