Frequency-variation type demodulator and demodulating method

Details Frequency-variation type demodulator and demodulating method Frequency-variation type demodulator and demodulating method

2000-12-01

2003-02-11

Kinkead, Arnold (Department: 2817)

Demodulators

Frequency modulation demodulator

Input signal converted to and processed in pulse form

C329S304000, C375S324000, C375S340000

Reexamination Certificate

active

06518836

ABSTRACT:

BACKGROUND OF THIS INVENTION
1. Field of the Invention
This invention relates to frequency-variation type demodulator and demodulating method, and more particularly, to a method to enhance operation speed and to reduce chip complexity applied to frequency-converting type demodulator and demodulating method.
2. Description of Related Prior Art
In the medical application, the ultrasonic inspection for a child conceived in a mother-to-be or for organs in human body has been widely applied. As the ultrasonic signal is propagating within the human organs, the central frequency of the ultrasonic is varied according to the transmitting depth within the organ. Thus, a required frequency is generated using a frequency-converting type demodulator.
FIG. 1A
is a diagram showing the relationship between the frequency and time.
FIG. 1B
is a diagram showing another relationship between frequency and time. In
FIG. 1A
, F
start
represents a start frequency and F
slope
represents the slope of the frequency variation. The value of the frequency variation slope can be positive or negative. For example, in
FIG. 1B
, F
upslope
is a positive value, while F
downslope
is a negative value. In
FIG. 1A
, the magnitudes of F
start
and F
slope
are calculated from mathematical algorithm. The factors that affect F
start
and F
slope
include the attenuation coefficient of ultrasonic generated via traveling through different organs, and the transmitting depth within such organs. F
start
and F
slope
are used as input parameters provided for the demodulator. The detailed description is not illustrated here.
FIG. 2
shows a block diagram of a conventional demodulator. ƒ
p
(t) represents a transient phase demodulating frequency, ƒ
D
(t) represents a demodulating frequency profile, t
p
represents the demodulating reference time, and t-T
BREAK
is the time index after a turning frequency of the demodulating frequency. For example, in
FIG. 1B
, F
BREAK
is the break frequency of demodulating frequency, t
R
is the residue time, ƒ
PC
(t) is the phase correction value, ƒ
DV
(t) is the demodulating phase value, and e
j&phgr;
is the phaser value.
When a demodulating frequency is applied from a data input to a phase and frequency processor
200
, it is received via a frequency profile generator
202
in the phase and frequency processor
200
. Meanwhile, the demodulating frequency is operated by mathematical algorithm to obtain the demodulating frequency profile ƒ
p
(t) and the transient phase demodulating frequency ƒ
D
(t).
A multiplication operation is performed on the demodulating frequency profile ƒ
p
(t) and the demodulating reference time t
D
in the first multiplier
204
. The result obtained from the multiplication is then added with a constant in the first adder
212
. The result after the addition in the first adder
212
is the demodulating phase value ƒ
DV
(t). In
FIG. 1B
, when the demodulating reference time t
D
is less than the break time T
BREAK
, the demodulating reference time t
D
is output from a first multiplexer
208
to the first multiplier
204
, while a constant of “0” is output from the second multiplexer
210
to the first adder
212
. Meanwhile, the demodulating phase value is ƒ
DV
(t)=ƒ
D
(t)·t
D
. If the demodulating reference time t
D
is greater than the break time T
BREAK
, the first multiplexer
208
outputs a demodulating reference time t
D
−T
BREAK
to the first multiplier
204
, and the second multiplexer
210
outputs a constant ƒ
D
(T
BREAK
)·T
BREAK
. Meanwhile, the demodulating phase is ƒ
DV
(t)=ƒ
D
(t)·(t
D
−T
BREAK
)+ƒ
D
(T
BREAK
)·T
BREAK
.
A multiplication operation is performed on the transient phase demodulating frequency ƒ
p
(t) and the residue time t
R
in the second multiplier
206
. The result for the multiplication operation is the phase correction value ƒ
PC
(t). An addition operation is performed on the demodulating phase value ƒ
DV
(t) and the phase correction value ƒ
PC
(t) in the second adder
214
. The added value is the phase value &phgr;.
Sine value and cosine value are built in a look-up table
216
. When the phase value &phgr; is input to the look-up table
216
, a sine value and a cosine value corresponding to the input phase value &phgr; are generated. A measured digital signal is input to a third multiplier
218
at DataIn, and a multiplication operation is performed with the sine of the phase value &phgr;, to obtain a quadrature-phase demodulating signal. The quadrature-phase demodulating signal is output to a subordinative circuit at OUTPUT. Similarly, a multiplication operation is performed on the measured digital signal and the cosine of the phase value &phgr; to produce in an in-phase demodulating signal which is output to the subordinative circuit at OUTPUT.
The conventional demodulator requires a lot of multipliers for performing multiplication. When the digit number of the multiplier is large, the frequency is time varying and the multiplication has to be performed with a high speed operation clock, the operation of the demodulation cannot be achieved under the current technique. If the above method is to be implemented via hardware, there is a great difficulty in fabrication of integrated circuit.
SUMMARY OF THIS INVENTION
The invention provides frequency-variation type demodulator and demodulating method. A pipeline technique is used to reduce the computation load by addition or subtraction operation only. That is, adders or subtractors are used to replace the multipliers used in the conventional demodulator and demodulating method.
The demodulating method comprises the following steps. An initial value is received and delayed with a delay time to generate a control signal. The control signal, a start frequency, a frequency variation slope and a clock are provided to obtain a phase value via mathematical calculation. According to the phase value, a corresponding sine value and a corresponding cosine value are obtained from a look-up table. A digital signal is measured, then a multiplication operation is performed on the measured digital signal and the cosine value to obtain an in-phase demodulating signal. A multiplication operation is further performed on the measured digital signal and the sine value to obtain an out-of-phase demodulating phase.
In the demodulating method provided by the invention, the method for obtaining the phase value comprises the following steps. A parameter input value and a parameter address value are received. The parameter input value is allocated to obtain a start frequency and a frequency variation slope. A subtraction operation is performed on the start frequency and frequency variation slope to obtain the first differential.
A binary digit shift is performed on the frequency variation slope to obtain a shift value. An accumulated digit shift value, the digit shift value, the control signal and the clock are received to be performed with an addition operation, so that the updated accumulated digit shift value is obtained.
The first differential, the updated accumulated digit shift value, the control signal and the clock are received, and a subtraction operation is performed on the first differential and the updated accumulated digit shift value to obtain a second differential. The phase value obtain from the previous addition operation, the control signal, the second differential and the clock are received. An addition operation is performed on the phase value obtained from the previous addition operation and the second differential to obtain the phase value.
In the demodulator provided by the invention, a control signal apparatus comprises an input terminal and an output terminal. The input terminal receives the start signal, while the control signal is sent out from the output terminal after a delay time. An in-phase and quadrature-phase function generator comprises a first input terminal coupled to the output of the control signal apparatus to receive the control signal. The

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