Coded data generation or conversion – Phase or time of phase change – Synchro or resolver signal
Reexamination Certificate
2000-06-09
2002-11-26
Tokar, Michael (Department: 2819)
Coded data generation or conversion
Phase or time of phase change
Synchro or resolver signal
C341S120000, C341S157000, C341S164000, C324S076470, C324S076550, C324S076620, C702S078000
Reexamination Certificate
active
06486805
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to methods and apparatus for determining the frequency of an electrical or electromagnetic signal.
2. Description of the Related Art
It is often necessary or useful to determine the frequency of an electrical or electromagnetic signal. One conventional way of measuring a signal's frequency is to time the signal with a known frequency generated by a stand-alone oscillator that is constantly in operation. However, oscillators consume power and require additional space on an integrated circuit. Therefore, it would be desirable to determine a frequency's signal without the use of an oscillator that is constantly in operation.
SUMMARY OF THE INVENTION
According to an embodiment of the present invention, an input signal is provided to an oscillator, which creates a count signal with a greater frequency than the input signal. The input signal triggers the oscillator to oscillate depending on the value of the input signal. Thus, unlike the conventional systems, the present invention does not employ an oscillator that continually generates a signal with a particular frequency. The oscillator output is provided to a counter, which counts the number of oscillations undergone by the oscillator during a single period of the input signal or a number of periods of the input signal, whichever is desired. Since the oscillator frequency is greater than the frequency of the input signal, the oscillator effectively acts like a clock to time the input signal; the counter effectively acts to record the ‘time’ measured by the oscillator (clock). More formally, the counter generates a count value based upon the width of the input signal pulses. The counter output is provided to a decoder, which interprets the count generated by the counter.
The input signal is provided to a delay circuit, which creates a delayed version of the input signal, which is provided to the counter. When the input signal has cycled through one period or a number of periods, whichever is desired, the output of the delay circuit changes, thereby resetting the counter so that it can begin to count for a new period or periods. The amount of delay provided by the delay circuit dictates the number of periods the counter counts before it is reset. Counting a number of periods allows an average frequency over those periods to be determined. Alternatively, if a single period is used to calculate the frequency, a number of frequencies as determined by the decoder may be averaged.
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Barnes & Thornburg
LSI Logic Corporation
Nguyen Khai
Tokar Michael
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