Frequency synthesizing circuit having a frequency multiplier...

Details Frequency synthesizing circuit having a frequency multiplier... Frequency synthesizing circuit having a frequency multiplier...

2005-08-23

2005-08-23

Lee, Benny (Department: 2817)

Oscillators

Polyphase output

C331S002000, C327S147000

Reexamination Certificate

active

06933791

ABSTRACT:
A frequency synthesizing circuit is provided. The frequency synthesizing circuit includes a frequency multiplying circuit and a phase-locked loop, wherein the frequency multiplying circuit can converts a reference signal having a low frequency into a high frequency signal for being a reference signal of the phase-locked loop, so that the loop bandwidth of the phase-locked loop can be increased to reduce jitter of the output signal. The present invention utilizes the delay-locked loop to generate multiphase output signals that equivalently divide a cycle of the reference signal for achieving a frequency multiplying through cooperating with a phase synthesizer. Through double frequency multiplying functions of the delay loop and the phase locked loop, a phase error accumulation caused by the single frequency multiplying of the conventional phase-locked loop with narrow loop bandwidth can be reduced. Furthermore, the frequency multiplying can be adjusted by synthesizing different phases of delay-locked loop and the divider coefficient of the phase-locked loop.

REFERENCES:
patent: 5889436 (1999-03-01), Yeung et al.
patent: 6107891 (2000-08-01), Coy
patent: 6759911 (2004-07-01), Gomm et al.
patent: 2002/0033736 (2002-03-01), Heymann

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