Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation
Reexamination Certificate
2002-10-21
2004-11-30
Kinkead, Arnold (Department: 2817)
Oscillators
Automatic frequency stabilization using a phase or frequency...
Tuning compensation
C331S00100A, C331S025000, C327S105000, C327S107000, C327S159000, C327S106000, C375S376000
Reexamination Certificate
active
06825729
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to a frequency synthesizer, in particular for radio stations in a mobile radio system.
A frequency synthesizer in a form such as this is known in principle from U.S. Pat. No. 4,965,533.
Frequency synthesizers, which can be tuned within a few microseconds over the entire frequency band that is available for the transmission of radio signals, are required for frequency hopping in mobile radio base stations, for example to the GSM Standard (GSM: Global System for Mobile Communication). Furthermore, the signals which are produced by such frequency synthesizers must have very little phase noise, in order to achieve good transmission quality for the radio signals.
In order to satisfy these requirements, two frequency synthesizers are used, for example, in mobile radio base stations, and a switch is used to switch alternately between these two frequency synthesizers. However, the hardware complexity for such a solution is very high; furthermore, the frequency synthesizers must be isolated from one another, and this is complex, that is to say crosstalk from signals in the one frequency synthesizer to the other frequency synthesizer must be suppressed as well as possible.
In addition to the frequency synthesizer which is known from U.S. Pat. No. 4,965,533, a further embodiment of a frequency synthesizer is known (DE 43 20 087) which has a direct digital frequency synthesizer (DDS) in the feedback loop of a phase locked loop (PLL) arrangement, and a refinement of a direct digital frequency synthesizer is also known (U.S. Pat. No. 5,563,535).
The known circuit systems are not suitable either individually or in combination for quickly transforming an input signal at a very low frequency in comparison to the frequency of the output signal to an output signal at an RF carrier frequency.
SUMMARY OF THE INVENTION
One possible object of the present invention is therefore to design a frequency synthesizer, in particular for radio stations, with relatively little hardware complexity such that an input signal at a frequency which is very low in comparison to the frequency of the output signal is transformed quickly to an output signal at an RF carrier frequency.
A frequency synthesizer according to the invention, in particular for radio stations, transforms a digital input signal at a first frequency to a digital output signal at a second frequency. In a similar way to a “fractional N” synthesizer, the digital input signal is supplied to a series circuit comprising a phase detector, a filter and a voltage controlled oscillator. The digital output signal is fed back to a second input of the phase detector, which compares the phases of the fed-back signal and the digital input signal, and accordingly supplies its output signal to a downstream filter, in the present case a loop filter. The loop filter filters the supplied output signal from the phase detector and maps it onto a voltage which is suitable for driving the voltage controlled oscillator. The voltage controlled oscillator then produces the digital output signal at the second frequency, as a function of the voltage supplied to it.
When used in mobile radio base stations, the frequency synthesizer is intended to transform a digital input signal at a first frequency as quickly as possible to a digital output signal at a second frequency. This fast conversion or transformation is now achieved by a digital synthesizer in the feedback path of the frequency synthesizer. One major aspect is, accordingly, that the normal N/N+1 divider provided in the feedback path is replaced, as in the “fractional N” synthesizer, by a type of digital synthesizer which is clocked or fed with the digital output signal that is produced by the voltage controlled oscillator. Firstly, this saves the complex and, above all, technologically critical switchable loop filters, which are required in a “fractional N” synthesizer for fast and “clean” switching, that is to say switching without interference, between different frequencies of the digital output signal. Furthermore, the digital synthesizer is preferably suitable for an embodiment in the form of an integrated circuit. Since the frequency of the digital output signal is normally considerably higher than the frequency of the digital input signal, the output signal from the digital synthesizer may be produced in a very wide frequency range around the frequency of the digital input signal to be so pure, that is to say without interference, that there is no longer any need for a switchable loop filter as in the “fractional N” synthesizer. Furthermore, the digital synthesizer can be digitally programmed easily, so that the frequency synthesizer can be driven by digital signals, for example, directly from a logic circuit or from a processor.
The digital synthesizer preferably has a first sigma-delta modulator, which transforms the digital output signal to a signal at a third frequency, which is suitable for processing by the phase detector and by further modules upstream of it. In particular, the first sigma-delta modulator is preferably fourth order. This embodiment has been found to be the best compromise between hardware complexity and the achievable frequency synthesizer accuracy.
In particular, the first sigma-delta modulator is driven by a digital oscillator, to which the digital output signal is supplied. The digital oscillator in a first preferred embodiment comprises a series circuit formed by a second sigma-delta modulator, which is preferably fourth order, and a digital integrator. The digital output signal is down-mixed via the digital oscillator, that is to say it is transformed to a signal at another frequency, especially at a lower frequency.
In one preferred embodiment, the digital integrator has a modulo-N integrator and a memory. The modulo-N integrator integrates the output signal from the second sigma-delta modulator in the discrete time domain modulo-N and produces a digital output signal, which drives the memory which in turn contains a table with N values of the sine-wave function. A specific value of the sine-wave function is thus read from the memory via the digital output signal from the modulo-N integrator, and is passed as an input signal to the first sigma-delta modulator. The formal relationship between the input signal or value “i” of the memory and the function values stored in the memory is in this case 4 sin(2&pgr;i/N).
The digital synthesizer preferably has an analog modulator, to which the digital output signal and the output signal from the first sigma-delta modulator are supplied, and which produces a signal which is supplied to the second input of the phase detector. The analog modulator is used to suppress jitter in the output signal from the digital synthesizer and thus, in the end, to achieve high accuracy in the transformation of the digital input signal of the frequency synthesizer to the digital output signal.
Finally, in a further preferred embodiment, the digital synthesizer is followed by a bandpass filter, in order to remove interference frequencies, in particular harmonics and spurious responses, from the output signal from the digital synthesizer, which interference frequencies can likewise influence the accuracy of the transformation by the frequency synthesizer.
An alternative embodiment of the implementation according to the described related art is the use of a so-called “fractional N” synthesizer instead of two frequency synthesizers, with the “fractional N” synthesizer having a high comparison frequency as well as a wide loop bandwidth and hence a short tuning time. This is achieved by setting a broken-rational division ratio between the comparison frequency and the output frequency from the frequency synthesizer. Since phase interference can occur during switching of the normally used N/N+1 divider in the “fractional N” synthesizer, sigma-delta modulation must be used to process the output signal from the divider, which results in the interference being spectrally distributed in frequency ranges which can
Kinkead Arnold
Siemens Aktiengesellschaft
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