Frequency synthesizer with ROM controlled divider and display

Telecommunications – Receiver or analog modulated signal frequency converter – Signal selection based on frequency

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334 87, H04B 106

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active

042876001

ABSTRACT:
A frequency synthesizer is disclosed in which a single read only memory (ROM) is utilized to directly control programmable frequency dividers in a phase locked loop while also directly controlling the excitation of seven segment visual digital display modules. During the tuning of the frequency synthesizer, an enable circuit disables the programmable dividers while altering the input signals to the read only memory such that direct drive signals are produced by the output of the read only memory which alternately excite two separate seven segment displays modules. After the tuning operation is completed, the enable circuit alters the input signals to the read only memory, simultaneously enables the programmable dividers, and effectively disables the digital display modules such that they hold their previous visual displays.

REFERENCES:
patent: 3835424 (1974-09-01), Marik
patent: 3845394 (1974-10-01), Hamada
patent: 3846707 (1974-11-01), Sakamoto
patent: 3968440 (1976-07-01), Ehni
patent: 3973205 (1976-08-01), Tanaka
patent: 4024477 (1977-05-01), Yamaguchi
patent: 4114103 (1978-09-01), Pflasterer
patent: 4117407 (1978-09-01), Kusakabe
National Semiconductor DS8900 Frequency Synthesizer, Preliminary Specifications, Feb. 1977.

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