Frequency synthesizer having dual phase locked loops

Details Frequency synthesizer having dual phase locked loops Frequency synthesizer having dual phase locked loops

1995-08-09

1996-11-05

Mis, David

Oscillators

Automatic frequency stabilization using a phase or frequency...

Plural oscillators controlled

331 1A, 331 16, 331 18, 327107, 327147, 327150, 455260, H03L 707, H03L 716

Patent

active

055721680

ABSTRACT:
A frequency synthesizer circuit for the front end of an RF system. The frequency synthesizer uses two pulse-swallow phase-locked loops in a synthesizer architecture that produces an output frequency that is a function of the two reference frequencies used as inputs into the two phase-locked loops. As a result, the frequency synthesizer can be incremented in steps equal to the differential of the reference frequencies of the two phase-locked loops, while the frequency outputs of each of the phase-locked loops can be incremented in much larger steps. This enables the two phase-locked loops to employ relatively large bandwidths, thereby achieving a faster signal lock as well as a better suppression of the voltage controlled oscillator (VCO) phase noise in each loop. The use of a dual loop synthesizer architecture allows for feedback correction of the VCO phase noise outside the loop bandwidth.

REFERENCES:
patent: 4380743 (1983-04-01), Underhill et al.
patent: 4599579 (1986-07-01), McCann
patent: 5337005 (1994-08-01), Fenk et al.
patent: 5361044 (1994-11-01), Norimatu et al.
patent: 5422604 (1995-06-01), Jokura

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