Modulators – Frequency shift keying modulator or minimum shift keying...
Reexamination Certificate
2000-04-20
2002-05-21
Kinkead, Arnold (Department: 2817)
Modulators
Frequency shift keying modulator or minimum shift keying...
C332S101000, C332S127000, C375S272000, C375S275000, C375S303000, C375S306000
Reexamination Certificate
active
06392499
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a frequency shift modulation circuit, and more particularly to a frequency shift modulation circuit capable of reliably shifting the frequency of an output signal.
2. Description of the Related Art
A conventional frequency shift modulation circuit such as shown in
FIG. 6
is known.
This modulation circuit has a reference oscillator
51
for generating a signal having a reference oscillation frequency, and operates in the following manner.
A frequency shift keying (FSK) data signal is supplied to a modulation level adjustor
50
which adjusts the modulation level of the FSK data signal and supplied to the reference oscillator
51
and via a balance adjustor
53
to a phase-locked loop (PLL)
52
. The reference oscillator
51
generates a signal having an oscillation frequency corresponding to the input FSK data signal. The PLL
52
outputs a frequency shift signal whose phase is synchronized with that of the reference frequency signal output from the reference oscillator
51
and whose frequency is defined by the FSK data signal.
A conventional frequency shift modulation circuit such as shown in
FIG. 7
is also known.
This modulation circuit is input with an external signal having a reference frequency, and two PLLs
60
and
61
converts the frequency of an output signal in accordance with an FSK data signal, to thereby shift the frequency of an output signal of the modulation circuit.
PLL
60
shifts the frequency of a low frequency band signal, whereas PLL
61
shifts the frequency of a high frequency band signal.
According to the above-described conventional techniques, the modulation circuit having the reference oscillator shown in
FIG. 6
has a limit of the range wherein the reference oscillator can stably shift the frequency.
Therefore, if the frequency shift width is broadened, the frequency stability lowers and the frequency of an output signal cannot be shifted stably.
With the modulating circuit for shifting the frequency by using two PLLs shown in
FIG. 7
, an output signal having a low frequency (e.g, 10 Hz or lower) cannot be generated because of the response characteristics of PLL.
SUMMARY OF THE INVENTION
The invention has been made under the above-described circumstances and aims at providing a frequency shift modulation circuit capable of stably shifting the frequency of an output signal.
In order to achieve the above object of the invention, according to one aspect of the invention, there is provided a frequency shift modulation circuit for generating a frequency shift signal whose frequency is shifted in accordance with a value of digital data, the frequency modulation circuit comprising: a composite oscillator such as a direct digital synthesizer for receiving predetermined frequency setting data and outputting a reference frequency signal having a frequency represented by the frequency setting data; and a phase sync circuit for generating a frequency shift signal whose phase is synchronized with the reference frequency signal output from the composite oscillator.
In the structure of the frequency shift modulation circuit, the composite oscillator has a plurality of frequency registers for storing the frequency setting data representing different frequencies. The composite oscillator has also the signal generator for selecting one of the plurality of frequency registers, reading the frequency setting data from the selected frequency register, and generating a reference frequency signal for the phase sync circuit having a frequency represented by the read frequency setting data. The phase sync circuit generates a frequency shift signal whose phase is synchronized with the reference frequency signal output from the composite oscillator.
Accordingly, the frequency of the reference frequency signal can be switched discretely, so that a frequency shift signal having a high frequency stability and a large frequency shift can be obtained.
The signal generator preferably includes selecting means for selecting the frequency register from which the frequency setting data is read, in accordance with a value of the digital data. Accordingly, the frequency of an output signal can be discretely switched in accordance with the value of modulation digital data, so that a frequency shift signal having a high frequency stability and a large frequency shift can be obtained.
The frequency shift modulation circuit may further comprises a supply circuit for shaping a portion of a waveform of the digital data and supplying the shaped waveform to the phase sync circuit, wherein the phase sync circuit includes means such as a voltage-controlled oscillator (VCO) for shifting a frequency of the frequency shift signal in accordance with a value of digital data supplied from the supply circuit. In this case, the waveform shaped digital data can be made matching the frequency shift level of an output signal from the composite oscillator, so that a large frequency shift can be made stably.
According to a second aspect of the invention, there is provided a frequency shift modulation circuit having at least two sets of frequency setting data, wherein the frequency shift modulation circuit modulates and shifts a frequency of an output signal having a frequency represented by the frequency setting data corresponding to a value of modulation digital data.
The frequency shift modulation circuit is preferable provided with a CPU for fetching an external input signal such as an FSK data signal and generating the digital data. In this case, it is possible to prevent the frequency shift fluctuation to be caused by a level change in the input signal, and more stable frequency modulation becomes possible. The baud rate of transmission data may be changed by software, or the input data may be added with a bit sync, a frame sync, an error correction code and the like.
REFERENCES:
patent: 5436599 (1995-07-01), Franson et al.
Kabushiki Kaisha Kenwood
Kinkead Arnold
Robinson Eric J.
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