Amplifiers – With semiconductor amplifying device – Including differential amplifier
Patent
1997-10-20
1999-07-13
Mullins, James B.
Amplifiers
With semiconductor amplifying device
Including differential amplifier
330306, 360 67, H03F 345, G11B 502
Patent
active
059232161
DESCRIPTION:
BRIEF SUMMARY
The invention relates to an amplifier especially suitable for use as a reading-head amplifier in a disc drive.
A first amplification stage, for a disc drive employing a magneto-resistive head, which is capable of operation with a supply voltage as low as 3.6 volts is described at pages 393 to 395 of IBM Technical Disclosure Bulletin, vol. 36, no. 3 of March 1993.
A first aspect of the invention is the provision of an amplifier including a current generator connected to one of its input ports for, in operation, injecting a current into a load which, in operation, is connected to the said input port of the amplifier,
a frequency-selective amplifying circuit connected to the said input port, the frequency-selective amplifying circuit, in operation, amplifying input signals excluding the injected current present at the said input port and
a voltage cancellation circuit connected within the frequency-selective amplifying circuit, the voltage cancellation circuit, in operation, opposing a condition of imbalance within the frequency-selective amplifying circuit attributable to the injected current,
wherein the current generator includes a network of transistor current mirrors which, in operation, supply a first current to a first terminal and sink a second current at a second terminal of the input port, the first and second currents being unequal.
Preferably, the relative dimensions of the transistor current mirrors establish the current ratios existing in the network of transistor current mirrors.
Preferably, the network of transistor current mirrors includes a first transistor current mirror, a second transistor current mirror and a third transistor current mirror, the third transistor current mirror being connected to receive current from the first transistor current mirror, the second and third transistor current mirrors, in operation, providing the first and second currents.
Preferably, the voltage cancellation circuit is connected to respond, in operation, to a d.c. output voltage from the frequency-selective amplifying circuit and to apply a signal to an input element of the frequency-selective amplifying circuit in such a sense as to drive the d.c. output voltage of the frequency-selective amplifying circuit towards zero volts.
Preferably, the voltage cancellation circuit operates initially with a first bandwidth and a first gain and, subsequently, with a second bandwidth which is narrower than the first bandwidth and a second gain which is substantially equal to the first gain.
Preferably, the voltage cancellation circuit, in operation, responds to a first operating-voltage at a low level and a second operating-voltage at a high level in the frequency-selective amplifying circuit and applies a signal to an input element of the frequency-selective amplifying circuit in a sense such as to oppose a departure of the first and second operating voltages from selected values.
One embodiment of the voltage cancellation circuit includes a current-amplifier output stage which, in operation, maintains an input d.c. voltage at an input element of the frequency-selective amplifying circuit for opposing the effect of the injected current.
An alternative embodiment of the voltage cancellation circuit includes a voltage-amplifier output stage connected in series with a current-setting resistor for maintaining an input d.c. voltage at an input element of the frequency-selective amplifying circuit for, in operation, opposing the effect of the injected current.
Preferably, a capacitor is connected to a port of the voltage-cancellation circuit and determines the bandwidth of the voltage-cancellation circuit.
Preferably, the frequency-selective amplifying circuit includes a differentially-connected bipolar transistor input stage so connected as to operate in a common-base configuration over the frequency range of the frequency-selective amplifying circuit.
Preferably one transistor of the differentially-connected input stage is provided with a fixed base voltage bias and the base voltage bias of the opposing transistor of th
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patent: 5204789 (1993-04-01), Jove et al.
patent: 5258723 (1993-11-01), Mazzucco et al.
patent: 5293136 (1994-03-01), Ryat
Mullins James B.
Seagate Technology Inc.
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