Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Pulse multiplication or division
Reexamination Certificate
2005-11-22
2005-11-22
Wambach, Margaret R. (Department: 2816)
Electrical pulse counters, pulse dividers, or shift registers: c
Systems
Pulse multiplication or division
C377S048000, C327S115000, C327S117000, C327S118000, C327S160000
Reexamination Certificate
active
06968029
ABSTRACT:
A synchronous prescaler is provided that has an input line for receiving an input signal, which is synchronized to a low order dual modulus prescaler. The dual modulus prescaler generally divides responsive to a mode command line, but may have a dead-zone period where it may fail to respond to a generated mode command. The dual modulus prescaler also has an output line that is synchronized to an extender section. The extender section is used to further divide the input signal, and is synchronized to an adjustable counter section. A sync controller circuit receives an output from the counter section, as well as a timing signal from the extender, and generates the mode signal on the mode command line. In this arrangement, the sync controller generates the mode signal at a time when the low order dual modulus is in a condition to change divide modes, thereby avoiding providing the signal during the dead-zone period.
REFERENCES:
patent: 4264863 (1981-04-01), Kojima
patent: 5361044 (1994-11-01), Norimatu et al.
patent: 5640116 (1997-06-01), Kobayashi et al.
patent: 6466065 (2002-10-01), Takekawa
patent: 6614870 (2003-09-01), Miller
“RF Singal Processing, Fractional N Synthesizers”, RFDesign, Nov. 2000, pp. 34-50(even pages only).
Ali Akbar
Lee Chang-Hyeon
Kolegraff William J.
Skyworks Solutions Inc.
Wambach Margaret R.
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