Frequency multiplier circuit

Details Frequency multiplier circuit Frequency multiplier circuit

1994-12-23

1996-05-07

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

327122, 327158, 327545, 377 47, H03B 1900

Patent

active

055149901

ABSTRACT:
An input buffer circuit includes an output circuit and supplies a plurality of signals in response to an input signal. A delay line is constituted of a plurality of delay cells connected in series and delays the signals supplied from the input buffer circuit. A PLL circuit connected to the delay line, includes a level converter which outputs a control signal for controlling a delay time of the delay line. An output signal generation circuit generates a signal having a multiplied frequency from the output signal of the input buffer circuit and the output signal of a tap of the delay line. Each of the delay cells has an output circuit having the same arrangement as that of the output circuit provided in the input buffer circuit, and a clocked inverter circuit included in each of the output circuits of the delay cells and input buffer circuit is controlled by the control signal output from the level converter. Therefore, the waveform of the signal output from the output circuit of the input buffer circuit can be made identical with that of the signal output from the output circuit of each delay cell, and the signal having the multiplied frequency output from the output signal generation circuit has a fixed duty ratio.

REFERENCES:
patent: 4596954 (1986-06-01), Haque
patent: 4684897 (1987-08-01), Richards et al.
patent: 4843331 (1989-06-01), Yang
patent: 4859970 (1989-08-01), Matsuo et al.
patent: 4994687 (1991-02-01), Fujii et al.
patent: 5216301 (1993-06-01), Gleeson, III et al.
patent: 5321734 (1994-06-01), Ogata
patent: 5359635 (1994-10-01), Atriss et al.
"A High Performance VFO-LSI Using 2-micron CMOS Analog and Digital Standard Cel Methodology", S. Fuji et al., Symposium on VLSI Circuits, X-3, pp. 115-116 (1988).

Affiliated with

Also associated with

Rating

Frequency multiplier circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Frequency multiplier circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Frequency multiplier circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1229769