Frequency multiplier

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

328 15, 328 20, 328156, 307529, 307271, 307266, 307498, G06G 716, H03K 3017

Patent

active

046349871

ABSTRACT:
VLF communication signals encoded in MSK format contain phase ambiguities that must be resolved in order to use such signals in navigation systems. The ambiguities are resolved by the present frequency multiplying device that in one embodiment operates to double the frequency of an input signal and mix the doubled input signal with a mixing signal to produce an output signal having first and second states. The device includes a transition detector (42) for generating a trigger signal in response to each low-to-high or high-to-low transition of the input signal that occurs when the output signal is in its second state, and a bistable circuit (44) for generating the output signal in response to the trigger signal and to a mixing signal. The bistable circuit responds to the trigger signal to cause the output signal to be in its first state, and responds to a periodic characteristic of the mixing signal to cause the output signal to be in its second state. The transition detector may comprise a positive edge triggered flip-flop (50) and a negative edge triggered flip-flop (52). The bistable means may comprise a third flip-flop (56) having the mixing signal connected to its clock input and the trigger signal connected to its clear input. The frequency doubling device may also include means (58) for selectively disabling the second flip-flop so that the frequency of the input signal is not doubled.

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"Digital Multiplier", by Lawrence N. Merson, RCA Technical Notes, No. 736, Jan. 1968.

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