Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – Frequency of cyclic current or voltage
Reexamination Certificate
2000-01-27
2001-11-13
Brown, Glenn W. (Department: 2858)
Electricity: measuring and testing
Measuring, testing, or sensing electricity, per se
Frequency of cyclic current or voltage
C324S600000, C327S114000
Reexamination Certificate
active
06316929
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a frequency measurement test circuit used to measure the frequency of a signal output from, e.g., a phase-locked loop incorporated in a large scale integrated circuit, and a semiconductor integrated circuit having the frequency measurement test circuit.
Conventionally, to test a large scale integrated circuit (to be referred to as an LSI hereinafter) incorporating a phase-locked loop (to be referred to as a PLL hereinafter), generally, the frequency in the locked state of the PLL is measured using an analog tester and digital tester, and it is checked whether the frequency has a desired value. That is, testing need be performed twice with the analog tester and digital tester. However, the analog tester and digital tester are expensive, and the measurement time is long because measurement must be performed twice. An apparatus capable of testing frequencies using only a digital tester has been disclosed.
FIGS. 3A and 3B
show conventional test circuit. As shown in
FIGS. 3A and 3B
, conventional digital testers (test circuits)
11
a
and
11
b
are arranged outside digital integrated circuits (to be referred to as ICs hereinafter)
12
each incorporating a PLL. The digital testers
11
a
and
11
b
have external and internal frequency measurement devices
13
a
and
13
b,
respectively. The frequency measurement device
13
a
or
13
b
measures the frequency in the locked state of the PLL. The digital tester
11
a
or
11
b
determines whether the measured frequency has a desired value. Since such conventional digital tester
11
a
or
11
b
requires the frequency measurement device
13
a
or
13
b,
the circuit becomes complex. Japanese Patent Laid-Open No. 9-197024 has proposed a simple and inexpensive test circuit that solves the problem.
FIG. 4
shows the conventional test circuit disclosed in Japanese Patent Laid-Open No. 9-197024. The conventional test circuit disclosed in this prior art has two counters
22
a
and
22
b
which receive a signal output from a PLL
21
. The two counters
22
a
and
22
b
are selected by a control signal CE whose duty ratio is 50%. The test circuit also has a comparator
23
for comparing the signal output from the counter
22
a
within a predetermined period with that output from the counter
22
b
within a predetermined period. The test circuit further has a decoder
24
for outputting a signal in association with the output signals from the counters
22
a
and
22
b
and comparator
23
.
This conventional test circuit requires no frequency measurement device, and the circuit is simple. Since testing can be performed using only one tester, the circuit is less expensive than conventional circuits. However, the conventional test circuit disclosed in the above prior art requires the two counters
22
a
and
22
b
to detect that the phase is locked in the PLL
21
. Hence, the measurement accuracy must be increased by prolonging the measurement time. However, to prolong the measurement time, the counters
22
a
and
22
b
must have a large circuit scale. In addition, since the duty ratio of the control signal CE for controlling the counters
22
a
and
22
b
must be 50%, very high accuracy is required. To solve these problems, a circuit for detecting the phase-locked state is generally provided in the PLL.
Recently, a demand has arisen for measurement of not only the frequency of the PLL but also the oscillation frequency of a voltage-controlled oscillator (to be referred to as a VCO hereinafter) incorporated in the IC. The above-described circuit that receives the lock detection signal from the PLL can measure only the frequency in the phase-locked state of the PLL.
SUMMARY OF THE INVENTION
The present invention has been made in consideration of the above problems, and has as its object to provide a frequency measurement test circuit capable of accurately measuring a frequency whose phase is not locked, and a semiconductor integrated circuit having the frequency measurement test circuit.
In order to achieve the above object, according to the present invention, there is provided a frequency measurement test circuit comprising a frequency divider for frequency-dividing an input to be measured, and a detection circuit for outputting a signal of level set on the basis of a relationship in magnitude between the frequency of the signal frequency-divided by the frequency divider and that of a reference clock signal.
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patent: 3684965 (1972-08-01), Gautney et al.
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patent: 4115743 (1978-09-01), Lalande et al.
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patent: 4423383 (1983-12-01), Svendsen
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patent: 4580278 (1986-04-01), Yamamoto
patent: 4661965 (1987-04-01), Maru
patent: 4743864 (1988-05-01), Nakagawa et al.
patent: 4916403 (1990-04-01), Sudoh et al.
patent: 5111152 (1992-05-01), Makino
patent: 5164684 (1992-11-01), Tanaka et al.
patent: 5189379 (1993-02-01), Saito et al.
patent: 5710774 (1998-01-01), Suh et al.
patent: 5748120 (1998-05-01), Yasuda
patent: 61-3071 (1986-01-01), None
patent: 61-264266 (1986-11-01), None
patent: 1-121768 (1989-05-01), None
patent: 3-283821 (1991-12-01), None
patent: 3-291020 (1991-12-01), None
patent: 07-101224 (1995-11-01), None
patent: 8-316832 (1996-11-01), None
patent: 9-197024 (1997-07-01), None
Brown Glenn W.
Hamdan Wasseem H.
NEC Corporation
Sughrue Mion Zinn Macpeak & Seas, PLLC
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