Frequency locked loop speed up

Details Frequency locked loop speed up Frequency locked loop speed up

2002-06-07

2003-08-05

Le, N. (Department: 2858)

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

Frequency of cyclic current or voltage

C331S11700R, C331S00100A

Reexamination Certificate

active

06603299

ABSTRACT:

BACKGROUND
At the physical layer of a communication channel, integrated circuits transmit and receive signals over a transmission line. A single integrated circuit device can be used to both transmit and receive signals at each end of a transmission line. To recover the data within transmitted signal, the clock used to transmit the signal must be reproduced at the receiver. Typically, this is done with a clock recovery circuit.
At the receive end, an internal oscillator controlled by an independent variable, usually voltage, must be synchronized with the transmitter clock at the other end of the transmission line. Voltage controlled oscillators typically have a wide range of operation such as several hundred MHz. In a particular application, however, the oscillator is required to operate around less than 1% of a particular frequency. Thus, the oscillator has a much wider range than is required for transmission clock recovery circuits.
Because of the wide range of operation, a frequency lock loop is used to coarse adjust the voltage controlled oscillator. The frequency lock loop utilizes a local crystal oscillator similar to the one used to transmit the signal. A phase lock loop then performs a fine adjustment using the data signal itself to lock the voltage controlled oscillator to the transmitter frequency.
Under normal operation the time required to lock the voltage controlled oscillator at start up for a user is not too critical. But, when a manufacturer is required to reset/cycle power on a chip several times as part of functional testing of hundreds of chips, the time required to initialize the voltage controlled oscillator becomes significant. Thus, it is important to reduce voltage controlled oscillator initialization to reduce test time and improve productivity.
SUMMARY
In at least one implementation, a method is provided for testing a communication circuit having a clock recovery circuit. The method comprising initializing a voltage controlled oscillator to near an expected operating frequency upon power up of the clock recovery circuit by supplying a signal from an external tester.


REFERENCES:
patent: 5304955 (1994-04-01), Atriss et al.
patent: 5512860 (1996-04-01), Huscroft et al.

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