Frequency locked loop

Details Frequency locked loop Frequency locked loop

1993-03-25

1994-08-30

Nelli, Raymond A.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Particular error voltage control

331 34, 331 1A, H03L 700

Patent

active

053431693

ABSTRACT:
A frequency locked loop includes a phase comparator receiving first and second periodic signals and having a first output providing pulses if the first signal is in phase advance with respect to the second signal and a second output providing pulses in the opposite case; an oscillator providing the second signal; a counter, the state of which determines the frequency of the oscillator, having an incrementation input and a decrementation input; and a sampling circuit for transmitting each Nth of the pulses either to the incrementation input if the pulse occurs at one of the first and second outputs of the comparator, or to the decrementation input if the pulse occurs at the other of the first and second outputs.

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Patent Abstracts of japan, vol. 12, No. 24 (E-576) Jan. 23, 1988 & JP-A-62 179 756 (Sanyo Electric).
Transactions of the Institute of Electronics and Communication Engineers of Japan, Section E, vol. E63, No. 5, May 1980, Tokyo JP pp. 367-368, Taiichiro Kurita, et al. "A Digital Phase-Locked Loop with AND Filter".

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