Frequency lock loop

Details Frequency lock loop Frequency lock loop

1976-10-12

1978-04-04

Kominski, John

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 8, 331 11, 331 17, H03B 304

Patent

active

040830144

ABSTRACT:
A frequency lock loop circuit has a pair of square-wave pulse generators which are clocked from a common input. The width of the pulses from the first generator is dependent on the frequency of the clocking signal; the width of the pulses from the second generator is dependent on a reference frequency. The difference in the width of the pulses from the two generators is fed back as an error signal to adjust the frequency of the clocking signal until the two waveforms are aligned. In a heterodyne receiver, the clocking signal may be the intermediate frequency signal from the mixer and it may then be adjusted by adjusting the frequency of the local oscillator in accordance with the pulse-width difference signal.

REFERENCES:
patent: 3005165 (1961-10-01), Lenigan
patent: 3376518 (1968-04-01), Emmer

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