Frequency generating circuit

Details Frequency generating circuit Frequency generating circuit

1997-05-22

2000-12-26

Ghebretinsae, Temesghen

Pulse or digital communications

Receivers

331172, 331177R, H04L 2706

Patent

active

061670979

ABSTRACT:
A receiving apparatus has a clock frequency generating circuit comprising in a first embodiment a low cost oscillator whose frequency is higher than the wanted clock frequency and in a second embodiment a low cost oscillator whose frequency can be higher or lower than the wanted clock frequency. By means of subtracting pulses from (first embodiment) or adding/subtracting pulses (second embodiment) to/from the output of the low cost oscillator, a clock frequency is generated which is stable within a specified tolerance range. More particularly, the receiving apparatus comprises a circuit (10,12) for receiving a transmitted signal, a circuit (14, 16) for deriving a repetitive reference signal from the received transmitted signal, clock signal generating circuit (22, 24, 32) for generating a clock signal having a frequency corresponding substantially to a desired frequency, and a circuit (36, 42, 46) for determining whether the clock frequency generated in respective time periods between successive reference signals varies relative to an arbitrarily set value, the circuit providing a control signal which is used to adjust the frequency of the generated clock signal.

REFERENCES:
patent: 4280099 (1981-07-01), Rattlingourd
patent: 5052026 (1991-09-01), Walley
patent: 5398007 (1995-03-01), Yamazaki et al.
patent: 5793819 (1998-08-01), Kawabata

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