Frequency doubler for an optical transceiver clock recovery circ

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Regenerating or restoring rectangular or pulse waveform

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Details

327113, 327116, 327356, H04L 2520, H04L 7027

Patent

active

057740020

ABSTRACT:
A clock recovery circuit is disclosed for recovering the data of a non-return to zero signal received at an optical transceiver. The clock recovery circuit includes an active element mixer for doubling the frequency of the received non-return to zero encoded digital signal. The mixer includes a delay element for delaying the received non-return to zero signal and an exclusive-OR circuit for exclusive-ORing the delayed and received non-return to zero signals. A SAW filter is also provided for recovering a clock from the frequency doubled signal outputted by the mixer.

REFERENCES:
patent: 3226570 (1965-12-01), Rosenbaum
patent: 4041326 (1977-08-01), Robinson
patent: 4715049 (1987-12-01), Andrews et al.
patent: 4775805 (1988-10-01), Whitefoot
patent: 4814874 (1989-03-01), Adachi
patent: 4843331 (1989-06-01), Yang
patent: 5197082 (1993-03-01), Uda et al.
patent: 5235233 (1993-08-01), Yamamoto
Breslau, "Frequency Doubler", IBM Technical Bulletin, vol. 10, No. 6, Nov. 1967, p. 723.
Vijayakumaran Nair et al., "Square Wave Division for Symmetrical Outputs", Electronic Engineering, vol. 49, No. 592, (May 1977), p. 26.

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