Frequency division/multiplication with jitter minimization

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Frequency or repetition rate conversion or control

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C327S150000, C327S151000, C377S048000, C331S016000, C331S025000

Reexamination Certificate

active

07005899

ABSTRACT:
A method and system described for producing frequency multiplication/division by any non-integer output signal frequency relative to a reference signal frequency of a Phase Lock-Loop (PLL), while simultaneously maintaining low jitter. In one embodiment, the invention increases the number of the available clock phases to M and then shifts the output clock phase by one, every K/M cycle. In one aspect of the present invention, this is accomplished by adding a multiplexer (MUX) to the output of the PLL to implement the phase shifting every K/M cycles. In another aspect, the MUX is placed in the feedback loop of the PLL. In one embodiment, a quantizer is used to drive the MUX.

REFERENCES:
patent: 5081655 (1992-01-01), Long
patent: 5889436 (1999-03-01), Yeung et al.
patent: 6044123 (2000-03-01), Takla
patent: 6157694 (2000-12-01), Larsson
patent: 6181213 (2001-01-01), Chang
patent: 6441655 (2002-08-01), Fallahi et al.
patent: 6714056 (2004-03-01), Fallahi et al.
patent: 2004/0169534 (2004-09-01), Fallahi et al.
patent: 1 045 518 (2000-10-01), None
patent: 2 325 803 (1998-12-01), None
patent: WO 90/06017 (1990-05-01), None
Mills, “Phase-Locked Loops,” Printed from the McGraw-Hill Multimedia Encyclopedia of Science & Technology, Copyright © 1998, The McGraw-Hill Companies, Inc., pp. 1-5.
Snow, “Frequency Divider,” Printed from the McGraw-Hill Multimedia Encyclopedia of Science & Technology, Copyright © 1998, The McGraw-Hill Companies, Inc., pp. 1-2.
Black et al., “Pulse Modulation,” Printed from the McGraw-Hill Multimedia Encyclopedia of Science & Technology, Copyright © 1998, The McGraw-Hill Companies, Inc., pp. 1-10.
Alley, “Frequency-Modulation Detector,” Printed from the McGraw-Hill Multimedia Encyclopedia of Science & Technology, Copyright © 1998, The McGraw-Hill Companies, Inc., pp. 1-4.
Black et al., “Amplitude Modulation,” Printed from the McGraw-Hill Multimedia Encyclopedia of Science & Technology, Copyright © 1998, The McGraw-Hill Companies, Inc., pp. 1-5.
Curtin et al., “Phase-Locked Loops for High-Frequency Receivers and Transmitters—Part 1,”ADI—Analog Dialogue,vol. 33, No. 3, Mar., 1999, pp. 1-9, http://www.analog.com/publications/magazines/Dialogue/archives/33-03/phase/.
International Search Report, PCT/US00/33908, Dec. 1999, 4 pages.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Frequency division/multiplication with jitter minimization does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Frequency division/multiplication with jitter minimization, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Frequency division/multiplication with jitter minimization will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3631543

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.