Electrical pulse counters – pulse dividers – or shift registers: c – Pulse counting or dividing chains – Using bistable regenerative trigger circuits
Patent
1990-09-21
1992-05-05
Heyman, John S.
Electrical pulse counters, pulse dividers, or shift registers: c
Pulse counting or dividing chains
Using bistable regenerative trigger circuits
3072471, 307291, 307593, 307595, 377 47, H03K 2102, H03K 3356, H03K 1728
Patent
active
051114895
ABSTRACT:
In a frequency-dividing circuit for producing an output having a frequency half that of its input, a pair of terminals of a latch circuit are connected to input terminals of a pair of amplify/delay means, and are also connected to receive through a pair of transistors, the outputs of the amplify/delay means. A single-phase input signal is input to the control electrodes of the transistors to turn on and off the transistors. When the transistors are turned from off to on, the output states of the amplify/delay means are transferred through the transistors to invert the latch circuit, and the states of complementary terminals of the latch circuits are in turn transferred through the amplify/delay means to invert the output states of the outputs of the amplify/delay means. When the transistors are turned from on to off, no change occurs in the states of the circuit. In this way, the states of the circuit are inverted each time the transistors are turned from off to on. A frequency-divided output can therefore be derived at one of the outputs of the first and second amplify/delay means. Either one or both of the first and second inverters may be replaced by a NAND gate or a NOR gate for permitting reset of the circuit.
REFERENCES:
patent: 3131317 (1964-04-01), Yee
patent: 3971960 (1976-07-01), Means et al.
patent: 4051389 (1977-09-01), Kaneko et al.
patent: 4057738 (1977-11-01), Nishimura
patent: 4109209 (1978-08-01), Bismarck
patent: 4476401 (1984-10-01), Lin
Akiyama Masahiro
Shikata Makoto
Tanaka Koutarou
Heyman John S.
Manzo Edward D.
OKI Electric Industry Co., Ltd.
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